[Freedreno] [PATCH 13/17] drm/msm: Support multiple ringbuffers

kbuild test robot lkp at intel.com
Sat Jul 29 03:51:24 UTC 2017


Hi Jordan,

[auto build test WARNING on v4.13-rc2]
[also build test WARNING on next-20170728]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jordan-Crouse/drm-msm-GPU-fixes-and-features-for-4-14/20170729-063809
config: arm-multi_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm 

All warnings (new ones prefixed by >>):

   In file included from drivers/gpu/drm/msm/msm_drv.h:37:0,
                    from drivers/gpu/drm/msm/msm_gpu.h:24,
                    from drivers/gpu/drm/msm/msm_gpu.c:18:
   drivers/gpu/drm/msm/msm_gpu.c: In function 'msm_gpu_init':
>> drivers/gpu/drm/msm/msm_gpu.c:743:31: warning: format '%lu' expects argument of type 'long unsigned int', but argument 7 has type 'unsigned int' [-Wformat=]
      DRM_DEV_INFO_ONCE(drm->dev, "Only creating %lu ringbuffers\n",
                                  ^
   include/drm/drmP.h:208:60: note: in definition of macro 'DRM_DEV_INFO'
     drm_dev_printk(dev, KERN_INFO, DRM_UT_NONE, __func__, "", fmt, \
                                                               ^~~
>> drivers/gpu/drm/msm/msm_gpu.c:743:3: note: in expansion of macro 'DRM_DEV_INFO_ONCE'
      DRM_DEV_INFO_ONCE(drm->dev, "Only creating %lu ringbuffers\n",
      ^~~~~~~~~~~~~~~~~

vim +743 drivers/gpu/drm/msm/msm_gpu.c

   648	
   649	int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
   650			struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
   651			const char *name, struct msm_gpu_config *config)
   652	{
   653		int i, ret, nr_rings = config->nr_rings;
   654		void *memptrs;
   655		uint64_t memptrs_iova;
   656	
   657		if (WARN_ON(gpu->num_perfcntrs > ARRAY_SIZE(gpu->last_cntrs)))
   658			gpu->num_perfcntrs = ARRAY_SIZE(gpu->last_cntrs);
   659	
   660		gpu->dev = drm;
   661		gpu->funcs = funcs;
   662		gpu->name = name;
   663	
   664		INIT_LIST_HEAD(&gpu->active_list);
   665		INIT_WORK(&gpu->retire_work, retire_worker);
   666		INIT_WORK(&gpu->recover_work, recover_worker);
   667	
   668	
   669		setup_timer(&gpu->hangcheck_timer, hangcheck_handler,
   670				(unsigned long)gpu);
   671	
   672		spin_lock_init(&gpu->perf_lock);
   673	
   674	
   675		/* Map registers: */
   676		gpu->mmio = msm_ioremap(pdev, config->ioname, name);
   677		if (IS_ERR(gpu->mmio)) {
   678			ret = PTR_ERR(gpu->mmio);
   679			goto fail;
   680		}
   681	
   682		/* Get Interrupt: */
   683		gpu->irq = platform_get_irq_byname(pdev, config->irqname);
   684		if (gpu->irq < 0) {
   685			ret = gpu->irq;
   686			dev_err(drm->dev, "failed to get irq: %d\n", ret);
   687			goto fail;
   688		}
   689	
   690		ret = devm_request_irq(&pdev->dev, gpu->irq, irq_handler,
   691				IRQF_TRIGGER_HIGH, gpu->name, gpu);
   692		if (ret) {
   693			dev_err(drm->dev, "failed to request IRQ%u: %d\n", gpu->irq, ret);
   694			goto fail;
   695		}
   696	
   697		ret = get_clocks(pdev, gpu);
   698		if (ret)
   699			goto fail;
   700	
   701		gpu->ebi1_clk = msm_clk_get(pdev, "bus");
   702		DBG("ebi1_clk: %p", gpu->ebi1_clk);
   703		if (IS_ERR(gpu->ebi1_clk))
   704			gpu->ebi1_clk = NULL;
   705	
   706		/* Acquire regulators: */
   707		gpu->gpu_reg = devm_regulator_get(&pdev->dev, "vdd");
   708		DBG("gpu_reg: %p", gpu->gpu_reg);
   709		if (IS_ERR(gpu->gpu_reg))
   710			gpu->gpu_reg = NULL;
   711	
   712		gpu->gpu_cx = devm_regulator_get(&pdev->dev, "vddcx");
   713		DBG("gpu_cx: %p", gpu->gpu_cx);
   714		if (IS_ERR(gpu->gpu_cx))
   715			gpu->gpu_cx = NULL;
   716	
   717		gpu->pdev = pdev;
   718		platform_set_drvdata(pdev, gpu);
   719	
   720		bs_init(gpu);
   721	
   722		gpu->aspace = msm_gpu_create_address_space(gpu, pdev,
   723			config->va_start, config->va_end);
   724	
   725		if (gpu->aspace == NULL)
   726			dev_info(drm->dev, "%s: no IOMMU, fallback to VRAM carveout!\n", name);
   727		else if (IS_ERR(gpu->aspace)) {
   728			ret = PTR_ERR(gpu->aspace);
   729			goto fail;
   730		}
   731	
   732		memptrs = msm_gem_kernel_new(drm, sizeof(*gpu->memptrs_bo),
   733			MSM_BO_UNCACHED, gpu->aspace, &gpu->memptrs_bo,
   734			&memptrs_iova);
   735	
   736		if (IS_ERR(memptrs)) {
   737			ret = PTR_ERR(memptrs);
   738			dev_err(drm->dev, "could not allocate memptrs: %d\n", ret);
   739			goto fail;
   740		}
   741	
   742		if (nr_rings > ARRAY_SIZE(gpu->rb)) {
 > 743			DRM_DEV_INFO_ONCE(drm->dev, "Only creating %lu ringbuffers\n",
   744				ARRAY_SIZE(gpu->rb));
   745			nr_rings = ARRAY_SIZE(gpu->rb);
   746		}
   747	
   748		/* Create ringbuffer(s): */
   749		for (i = 0; i < nr_rings; i++) {
   750			gpu->rb[i] = msm_ringbuffer_new(gpu, i, memptrs, memptrs_iova);
   751	
   752			if (IS_ERR(gpu->rb[i])) {
   753				ret = PTR_ERR(gpu->rb[i]);
   754				dev_err(drm->dev,
   755					"could not create ringbuffer %d: %d\n", i, ret);
   756				goto fail;
   757			}
   758	
   759			memptrs += sizeof(struct msm_rbmemptrs);
   760			memptrs_iova += sizeof(struct msm_rbmemptrs);
   761		}
   762	
   763		gpu->nr_rings = nr_rings;
   764	
   765		return 0;
   766	
   767	fail:
   768		for (i = 0; i < ARRAY_SIZE(gpu->rb); i++)  {
   769			msm_ringbuffer_destroy(gpu->rb[i]);
   770			gpu->rb[i] = NULL;
   771		}
   772	
   773		if (gpu->memptrs_bo) {
   774			msm_gem_put_vaddr(gpu->memptrs_bo);
   775			msm_gem_put_iova(gpu->memptrs_bo, gpu->aspace);
   776			drm_gem_object_unreference_unlocked(gpu->memptrs_bo);
   777		}
   778	
   779		if (gpu->aspace) {
   780			gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu,
   781				NULL, 0);
   782			msm_gem_address_space_put(gpu->aspace);
   783		}
   784	
   785		platform_set_drvdata(pdev, NULL);
   786		return ret;
   787	}
   788	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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