[Freedreno] [PATCH 4/4] drm/msm: Support 64 bit iova in RD_CMDSTREAM_ADDR
Jordan Crouse
jcrouse at codeaurora.org
Tue Mar 7 16:50:30 UTC 2017
Output the upper 32 bits of a 64 bit iova in the RD_CMDSTREAM_ADDR
section while maintaining backwards compatibility for tools that
only understand 32 bit iovas.
Signed-off-by: Jordan Crouse <jcrouse at codeaurora.org>
---
drivers/gpu/drm/msm/msm_rd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c
index 6607456..1e23132 100644
--- a/drivers/gpu/drm/msm/msm_rd.c
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@ -348,7 +348,7 @@ void msm_rd_dump_submit(struct msm_gem_submit *submit)
}
for (i = 0; i < submit->nr_cmds; i++) {
- uint32_t iova = submit->cmd[i].iova;
+ uint64_t iova = submit->cmd[i].iova;
uint32_t szd = submit->cmd[i].size; /* in dwords */
/* snapshot cmdstream bo's (if we haven't already): */
@@ -367,7 +367,7 @@ void msm_rd_dump_submit(struct msm_gem_submit *submit)
case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
case MSM_SUBMIT_CMD_BUF:
rd_write_section(rd, RD_CMDSTREAM_ADDR,
- (uint32_t[2]){ iova, szd }, 8);
+ (uint32_t[3]){ iova, szd, iova >> 32 }, 12);
break;
}
}
--
1.9.1
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