[Freedreno] [PATCH 4/4] drm/msm/A6xx: Enable preemption for A6xx targets
Jordan Crouse
jcrouse at codeaurora.org
Tue Apr 3 21:19:56 UTC 2018
On Mon, Feb 26, 2018 at 01:08:23PM +0530, Sharat Masetty wrote:
> This patch simply increases the number of available ringbuffers,
> therefore enabling preemption.
>
Reviewed-by: Jordan Crouse <jcrouse at codeaurora.org>
> Signed-off-by: Sharat Masetty <smasetty at codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index b1a80ec..e83b066 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -1040,7 +1040,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
> adreno_gpu->registers = a6xx_registers;
> adreno_gpu->reg_offsets = a6xx_register_offsets;
>
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);
> if (ret) {
> a6xx_destroy(&(a6xx_gpu->base.base));
> return ERR_PTR(ret);
> --
> 1.9.1
>
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