[Freedreno] [PATCH v3 06/13] drm/msm/dpu: iterate for assigned hw ctl in virtual encoder
Sean Paul
sean at poorly.run
Tue Aug 14 19:24:28 UTC 2018
On Tue, Aug 07, 2018 at 08:12:33PM -0700, Jeykumar Sankaran wrote:
> Instead of iterating for hw ctrl per physical encoder, this
> patch moves the iterations and assignment to the virtual encoder.
>
> changes in v2:
> - none
> changes in v3:
> - none
>
> Change-Id: I896a8c36d6353986582e9d0fe3da9b2293579d4b
> Signed-off-by: Jeykumar Sankaran <jsanka at codeaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 22 ++++++++++++++++++++--
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 19 -------------------
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 19 -------------------
> 3 files changed, 20 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index a0ced79..7b82e2d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1017,9 +1017,11 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
> struct dpu_kms *dpu_kms;
> struct list_head *connector_list;
> struct drm_connector *conn = NULL, *conn_iter;
> - struct dpu_rm_hw_iter pp_iter;
> + struct dpu_rm_hw_iter pp_iter, ctl_iter;
> struct msm_display_topology topology;
> enum dpu_rm_topology_name topology_name;
> + struct dpu_hw_ctl *hw_ctl[MAX_CHANNELS_PER_ENC];
Instead of setting each one to null in the loop:
struct dpu_hw_ctl *hw_ctl[MAX_CHANNELS_PER_ENC] = { NULL };
> +
Extra line
> int i = 0, ret;
>
> if (!drm_enc) {
> @@ -1067,6 +1069,14 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
> dpu_enc->hw_pp[i] = (struct dpu_hw_pingpong *) pp_iter.hw;
> }
>
> + dpu_rm_init_hw_iter(&ctl_iter, drm_enc->base.id, DPU_HW_BLK_CTL);
> + for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {
> + hw_ctl[i] = NULL;
Remove once hw_ctl is initialized properly
> + if (!dpu_rm_get_hw(&dpu_kms->rm, &ctl_iter))
> + break;
> + hw_ctl[i] = (struct dpu_hw_ctl *)ctl_iter.hw;
> + }
> +
> topology_name = dpu_rm_get_topology_name(topology);
> for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
> @@ -1074,10 +1084,18 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
> if (phys) {
> if (!dpu_enc->hw_pp[i]) {
> DPU_ERROR_ENC(dpu_enc,
> - "invalid pingpong block for the encoder\n");
> + "no pp block assigned at idx: %d\n", i);
> return;
> }
> phys->hw_pp = dpu_enc->hw_pp[i];
> +
> + if (!hw_ctl[i]) {
> + DPU_ERROR_ENC(dpu_enc,
> + "no ctl block assigned at idx: %d\n", i);
> + return;
> + }
> + phys->hw_ctl = hw_ctl[i];
> +
> phys->connector = conn->state->connector;
> phys->topology_name = topology_name;
> if (phys->ops.mode_set)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index c8c4612..5c89868 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -196,9 +196,6 @@ static void dpu_encoder_phys_cmd_mode_set(
> {
> struct dpu_encoder_phys_cmd *cmd_enc =
> to_dpu_encoder_phys_cmd(phys_enc);
> - struct dpu_rm *rm = &phys_enc->dpu_kms->rm;
> - struct dpu_rm_hw_iter iter;
> - int i, instance;
>
> if (!phys_enc || !mode || !adj_mode) {
> DPU_ERROR("invalid args\n");
> @@ -208,22 +205,6 @@ static void dpu_encoder_phys_cmd_mode_set(
> DPU_DEBUG_CMDENC(cmd_enc, "caching mode:\n");
> drm_mode_debug_printmodeline(adj_mode);
>
> - instance = phys_enc->split_role == ENC_ROLE_SLAVE ? 1 : 0;
> -
> - /* Retrieve previously allocated HW Resources. Shouldn't fail */
> - dpu_rm_init_hw_iter(&iter, phys_enc->parent->base.id, DPU_HW_BLK_CTL);
> - for (i = 0; i <= instance; i++) {
> - if (dpu_rm_get_hw(rm, &iter))
> - phys_enc->hw_ctl = (struct dpu_hw_ctl *)iter.hw;
> - }
> -
> - if (IS_ERR_OR_NULL(phys_enc->hw_ctl)) {
> - DPU_ERROR_CMDENC(cmd_enc, "failed to init ctl: %ld\n",
> - PTR_ERR(phys_enc->hw_ctl));
> - phys_enc->hw_ctl = NULL;
> - return;
> - }
> -
> _dpu_encoder_phys_cmd_setup_irq_hw_idx(phys_enc);
> }
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index 57ece03..c0221cc 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -395,9 +395,6 @@ static void dpu_encoder_phys_vid_mode_set(
> struct drm_display_mode *mode,
> struct drm_display_mode *adj_mode)
> {
> - struct dpu_rm *rm;
> - struct dpu_rm_hw_iter iter;
> - int i, instance;
> struct dpu_encoder_phys_vid *vid_enc;
>
> if (!phys_enc || !phys_enc->dpu_kms) {
> @@ -405,7 +402,6 @@ static void dpu_encoder_phys_vid_mode_set(
> return;
> }
>
> - rm = &phys_enc->dpu_kms->rm;
> vid_enc = to_dpu_encoder_phys_vid(phys_enc);
>
> if (adj_mode) {
> @@ -414,21 +410,6 @@ static void dpu_encoder_phys_vid_mode_set(
> DPU_DEBUG_VIDENC(vid_enc, "caching mode:\n");
> }
>
> - instance = phys_enc->split_role == ENC_ROLE_SLAVE ? 1 : 0;
> -
> - /* Retrieve previously allocated HW Resources. Shouldn't fail */
> - dpu_rm_init_hw_iter(&iter, phys_enc->parent->base.id, DPU_HW_BLK_CTL);
> - for (i = 0; i <= instance; i++) {
> - if (dpu_rm_get_hw(rm, &iter))
> - phys_enc->hw_ctl = (struct dpu_hw_ctl *)iter.hw;
> - }
> - if (IS_ERR_OR_NULL(phys_enc->hw_ctl)) {
> - DPU_ERROR_VIDENC(vid_enc, "failed to init ctl, %ld\n",
> - PTR_ERR(phys_enc->hw_ctl));
> - phys_enc->hw_ctl = NULL;
> - return;
> - }
> -
> _dpu_encoder_phys_vid_setup_irq_hw_idx(phys_enc);
> }
>
> --
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--
Sean Paul, Software Engineer, Google / Chromium OS
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