[Freedreno] [RFC 0/4] msm: clk: Define a special power domain for SDM845 GX

[Stephen Boyd]

Quoting Jordan Crouse (2018-11-19 15:47:02)
> The GPU GX domain on SDM845 is nominally managed by the GMU microcontroller
> but there are certain circumstances when the CPU needs to be sure that the
> GX headswitch is off.
> 
> This RFC series adds a special modification for the GX power domain
> that always returns success for domain power on and uses the default
> gdsc functions for power down.
> 
> With this, we should be able to remove most of GX clocks from the gpucc
> and have a relatively clean way of handling the hardware workaround.
> 
> This is based on the series from [1] with some slight changes for the
> current for-next from Andy.
> 
> [1] https://patchwork.kernel.org/patch/10563887/
> 
> Jordan Crouse (4):
>   drm/msm/a6xx: Remove unwanted regulator code
>   clk: qcom: gdsc: Don't override existing gdsc pd functions
>   clk: qcom: Add a dummy enable function for GX gdsc
>   drm/msm/gpu: Attach to the GPU GX power domain

The clk bits look good to me, and would simplify the gpucc patches
sitting on the list. Can we roll those into or on top of the GPU clk
driver patches and split them from the GPU driver parts? I think the DTS
will be blocked on everything coming together, so it should be OK to let
the DTS bits come in and meet up with drm bits and clk bits all from
different trees.