[Freedreno] [PATCH 2/2] drm/msm: a6xx: Fix improper u64 division
Sean Paul
sean at poorly.run
Mon Oct 8 18:24:14 UTC 2018
From: Sean Paul <seanpaul at chromium.org>
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Fixes: a2c3c0a54d4c drm/msm/a6xx: Add devfreq support for a6xx
Cc: Sharat Masetty <smasetty at codeaurora.org>
Signed-off-by: Sean Paul <seanpaul at chromium.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index cdc3d59a659d..631257c297fd 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -761,18 +761,21 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
- u64 busy_cycles;
- unsigned long busy_time;
+ u64 busy_cycles, busy_time;
busy_cycles = gmu_read64(&a6xx_gpu->gmu,
REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_L,
REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_H);
- busy_time = ((busy_cycles - gpu->devfreq.busy_cycles) * 10) / 192;
+ busy_time = (busy_cycles - gpu->devfreq.busy_cycles) * 10;
+ do_div(busy_time, 192);
gpu->devfreq.busy_cycles = busy_cycles;
- return busy_time;
+ if (WARN_ON(busy_time > ~0LU))
+ return ~0LU;
+
+ return (unsigned long)busy_time;
}
static const struct adreno_gpu_funcs funcs = {
--
Sean Paul, Software Engineer, Google / Chromium OS
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