[Freedreno] [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing

[Jordan Crouse]

On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote:
> Layer mixer/pingpong block counts and hw ctl block counts
> will not be same for all the topologies (e.g. layer
> mixer muxing to single interface)
> 
> Use the encoder's split_role info to retrieve the
> respective control path for programming.
> 
> Signed-off-by: Jeykumar Sankaran <jsanka at codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 96cdf06..d12f896 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1060,6 +1060,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>  
>  	for (i = 0; i < dpu_enc->num_phys_encs; i++) {
>  		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
> +		int ctl_index;
>  
>  		if (phys) {
>  			if (!dpu_enc->hw_pp[i]) {
> @@ -1068,14 +1069,16 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
>  				return;
>  			}
>  
> -			if (!hw_ctl[i]) {
> +			ctl_index = phys->split_role == ENC_ROLE_SLAVE ? 1 : 0;
> +
> +			if (!hw_ctl[ctl_index]) {
>  				DPU_ERROR_ENC(dpu_enc, "no ctl block assigned"
> -					     "at idx: %d\n", i);
> +					     "at idx: %d\n", ctl_index);

I know you are only updating the previous code but we shouldn't be splitting the
string here for grep purposes.

>  				return;
>  			}
>  
>  			phys->hw_pp = dpu_enc->hw_pp[i];
> -			phys->hw_ctl = hw_ctl[i];
> +			phys->hw_ctl = hw_ctl[ctl_index];
>  
>  			phys->connector = conn->state->connector;
>  			if (phys->ops.mode_set)

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