[Freedreno] [PATCH v2 1/2] drm/msm: Fix A6XX support for opp-level
Rob Clark
robdclark at gmail.com
Wed Jan 16 23:32:34 UTC 2019
s
On Wed, Jan 16, 2019 at 1:46 PM Douglas Anderson <dianders at chromium.org> wrote:
>
> The bindings for Qualcomm opp levels changed after being Acked but
> before landing. Thus the code in the GPU driver that was relying on
> the old bindings is now broken.
>
> Let's change the code to match the new bindings by adjusting the old
> string 'qcom,level' to the new string 'opp-level'. See the patch
> ("dt-bindings: opp: Introduce opp-level bindings").
>
> NOTE: we will do additional cleanup to totally remove the string from
> the code and use the new dev_pm_opp_get_level() but we'll do it in a
> future patch. This will facilitate getting the important code fix in
> sooner without having to deal with cross-maintainer dependencies.
>
> This patch needs to land before the patch ("arm64: dts: sdm845: Add
> gpu and gmu device nodes") since if a tree contains the device tree
> patch but not this one you'll get a crash at bootup.
>
> Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support")
> Signed-off-by: Douglas Anderson <dianders at chromium.org>
thanks, I've pulled the first into msm-next and I'll grab the 2nd once
dev_pm_opp_get_level() lands
BR,
-R
> ---
>
> Changes in v2:
> - Split into two patches to facilitate landing.
>
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index 5beb83d1cf87..ce1b3cc4bf6d 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -944,7 +944,7 @@ static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq)
> np = dev_pm_opp_get_of_node(opp);
>
> if (np) {
> - of_property_read_u32(np, "qcom,level", &val);
> + of_property_read_u32(np, "opp-level", &val);
> of_node_put(np);
> }
>
> --
> 2.20.1.97.g81188d93c3-goog
>
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