[Freedreno] [PATCH 2/7] dt-bindings: arm-smmu: Add Adreno GPU variant
Stephen Boyd
sboyd at kernel.org
Tue Sep 17 18:56:24 UTC 2019
Quoting Jordan Crouse (2019-08-20 12:06:27)
> Add a compatible string to identify SMMUs that are attached
> to Adreno GPU devices that wish to support split pagetables.
>
> Signed-off-by: Jordan Crouse <jcrouse at codeaurora.org>
> ---
>
> Documentation/devicetree/bindings/iommu/arm,smmu.txt | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 3133f3b..3b07896 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -18,6 +18,7 @@ conditions.
> "arm,mmu-500"
> "cavium,smmu-v2"
> "qcom,smmu-v2"
> + "qcom,adreno-smmu-v2"
Is the tabbing weird here or just my MUA is failing?
>
> depending on the particular implementation and/or the
> version of the architecture implemented.
> @@ -31,6 +32,12 @@ conditions.
> as below, SoC-specific compatibles:
> "qcom,sdm845-smmu-500", "arm,mmu-500"
>
> + "qcom,adreno-smmu-v2" is a special implementation for
Heh, special.
> + SMMU devices attached to the Adreno GPU on Qcom devices.
> + If selected, this will enable split pagetable (TTBR1)
Is this selected? Sounds like Kconfig here.
> + support. Only use this if the GPU target is capable of
> + supporting 64 bit addresses.
> +
> - reg : Base address and size of the SMMU.
>
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