[Freedreno] [PATCH 2/3] gpu/drm: Fix spelling of *frequency*
Paul Menzel
pmenzel at molgen.mpg.de
Sun May 10 12:08:34 UTC 2020
Fix all occurrences with the command below.
git grep -l frequencey | xargs sed -i 's/frequencey/frequency/g'
Cc: Rob Clark <robdclark at gmail.com>
Cc: Sean Paul <sean at poorly.run>
Cc: linux-arm-msm at vger.kernel.org
Cc: freedreno at lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher at amd.com>
Cc: Christian König <christian.koenig at amd.com>
Cc: David (ChunMing) Zhou <David1.Zhou at amd.com>
Cc: amd-gfx at lists.freedesktop.org
Signed-off-by: Paul Menzel <pmenzel at molgen.mpg.de>
---
drivers/gpu/drm/amd/include/atombios.h | 4 ++--
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
drivers/gpu/drm/radeon/atombios.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
index afef574c3b88b..7fe1d0d66701c 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -6138,7 +6138,7 @@ ucLVDSOffToOnDelay_in4Ms: LVDS power down sequence time in unit of 4ms.
ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is customer platform specific parameters. By default it is 0.
-ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB pstate.
+ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB pstate.
**********************************************************************************************************************/
@@ -6346,7 +6346,7 @@ ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is custom
ulLCDBitDepthControlVal: GPU display control encoder bit dither control setting, used to program register mmFMT_BIT_DEPTH_CONTROL
-ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB P-State(P0, P1, P2 & P3).
+ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB P-State(P0, P1, P2 & P3).
ulNbpStateNClkFreq[4]: NB P-State NClk frequency in different NB P-State
usNBPStateVoltage[4]: NB P-State (P0/P1 & P2/P3) voltage; NBP3 refers to lowes voltage
usBootUpNBVoltage: NB P-State voltage during boot up before driver loaded
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 11ae5b8444c32..7b50c2b7af74f 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -743,7 +743,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi)
* esc clock is byte clock followed by a 4 bit divider,
* we need to find an escape clock frequency within the
* mipi DSI spec range within the maximum divider limit
- * We iterate here between an escape clock frequencey
+ * We iterate here between an escape clock frequency
* between 20 Mhz to 5 Mhz and pick up the first one
* that can be supported by our divider
*/
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 4d0f6de32957f..b9d7d54e537cf 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -5206,7 +5206,7 @@ ucLVDSOffToOnDelay_in4Ms: LVDS power down sequence time in unit of 4ms.
ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is customer platform specific parameters. By default it is 0.
-ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB pstate.
+ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB pstate.
**********************************************************************************************************************/
@@ -5413,7 +5413,7 @@ ucMinAllowedBL_Level: Lowest LCD backlight PWM level. This is custom
ulLCDBitDepthControlVal: GPU display control encoder bit dither control setting, used to program register mmFMT_BIT_DEPTH_CONTROL
-ulNbpStateMemclkFreq[4]: system memory clock frequencey in unit of 10Khz in different NB P-State(P0, P1, P2 & P3).
+ulNbpStateMemclkFreq[4]: system memory clock frequency in unit of 10Khz in different NB P-State(P0, P1, P2 & P3).
ulNbpStateNClkFreq[4]: NB P-State NClk frequency in different NB P-State
usNBPStateVoltage[4]: NB P-State (P0/P1 & P2/P3) voltage; NBP3 refers to lowes voltage
usBootUpNBVoltage: NB P-State voltage during boot up before driver loaded
--
2.26.2
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