[Freedreno] [PATCHv8 1/8] iommu/io-pgtable-arm: Add support to use system cache
Sai Prakash Ranjan
saiprakash.ranjan at codeaurora.org
Mon Nov 23 16:41:18 UTC 2020
On 2020-11-23 20:36, Will Deacon wrote:
> On Tue, Nov 17, 2020 at 08:00:40PM +0530, Sai Prakash Ranjan wrote:
>> Add a quirk IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to override
>> the attributes set in TCR for the page table walker when
>> using system cache.
>>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan at codeaurora.org>
>> ---
>> drivers/iommu/io-pgtable-arm.c | 10 ++++++++--
>> include/linux/io-pgtable.h | 4 ++++
>> 2 files changed, 12 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/iommu/io-pgtable-arm.c
>> b/drivers/iommu/io-pgtable-arm.c
>> index a7a9bc08dcd1..7c9ea9d7874a 100644
>> --- a/drivers/iommu/io-pgtable-arm.c
>> +++ b/drivers/iommu/io-pgtable-arm.c
>> @@ -761,7 +761,8 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg
>> *cfg, void *cookie)
>>
>> if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS |
>> IO_PGTABLE_QUIRK_NON_STRICT |
>> - IO_PGTABLE_QUIRK_ARM_TTBR1))
>> + IO_PGTABLE_QUIRK_ARM_TTBR1 |
>> + IO_PGTABLE_QUIRK_ARM_OUTER_WBWA))
>> return NULL;
>>
>> data = arm_lpae_alloc_pgtable(cfg);
>> @@ -773,10 +774,15 @@ arm_64_lpae_alloc_pgtable_s1(struct
>> io_pgtable_cfg *cfg, void *cookie)
>> tcr->sh = ARM_LPAE_TCR_SH_IS;
>> tcr->irgn = ARM_LPAE_TCR_RGN_WBWA;
>> tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;
>> + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_OUTER_WBWA)
>> + goto out_free_data;
>> } else {
>> tcr->sh = ARM_LPAE_TCR_SH_OS;
>> tcr->irgn = ARM_LPAE_TCR_RGN_NC;
>> - tcr->orgn = ARM_LPAE_TCR_RGN_NC;
>> + if (!(cfg->quirks & IO_PGTABLE_QUIRK_ARM_OUTER_WBWA))
>> + tcr->orgn = ARM_LPAE_TCR_RGN_NC;
>> + else
>> + tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;
>> }
>>
>> tg1 = cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1;
>> diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
>> index 4cde111e425b..a9a2c59fab37 100644
>> --- a/include/linux/io-pgtable.h
>> +++ b/include/linux/io-pgtable.h
>> @@ -86,6 +86,9 @@ struct io_pgtable_cfg {
>> *
>> * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
>> * for use in the upper half of a split address space.
>> + *
>> + * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the attributes set in
>> TCR for
>> + * the page table walker when using system cache.
>
> Please can you reword this to say:
>
> "Override the outer-cacheability attributes set in the TCR for a
> non-coherent
> page-table walker."
>
Sure, thanks.
--
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