[Freedreno] [PATCH 20/40] drm/msm/disp/dpu1/dpu_hw_sspp: Fix kernel-doc formatting abuse

[abhinavk at codeaurora.org]

On 2020-11-23 03:18, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
> 
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
> parameter or member 'ctx' not described in 'dpu_hw_sspp_setup_format'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
> parameter or member 'fmt' not described in 'dpu_hw_sspp_setup_format'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
> parameter or member 'flags' not described in
> 'dpu_hw_sspp_setup_format'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:240: warning: Function
> parameter or member 'rect_mode' not described in
> 'dpu_hw_sspp_setup_format'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:446: warning: Function
> parameter or member 'ctx' not described in 'dpu_hw_sspp_setup_rects'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:446: warning: Function
> parameter or member 'cfg' not described in 'dpu_hw_sspp_setup_rects'
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c:446: warning: Function
> parameter or member 'rect_index' not described in
> 'dpu_hw_sspp_setup_rects'
> 
> Cc: Rob Clark <robdclark at gmail.com>
> Cc: Sean Paul <sean at poorly.run>
> Cc: David Airlie <airlied at linux.ie>
> Cc: Daniel Vetter <daniel at ffwll.ch>
> Cc: Jonathan Marek <jonathan at marek.ca>
> Cc: linux-arm-msm at vger.kernel.org
> Cc: dri-devel at lists.freedesktop.org
> Cc: freedreno at lists.freedesktop.org
> Signed-off-by: Lee Jones <lee.jones at linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk at codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index c940b69435e16..2c2ca5335aa8c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -231,7 +231,7 @@ static void _sspp_setup_csc10_opmode(struct
> dpu_hw_pipe *ctx,
>  	DPU_REG_WRITE(&ctx->hw, SSPP_VIG_CSC_10_OP_MODE + idx, opmode);
>  }
> 
> -/**
> +/*
>   * Setup source pixel format, flip,
>   */
>  static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx,
> @@ -437,7 +437,7 @@ static u32 _dpu_hw_sspp_get_scaler3_ver(struct
> dpu_hw_pipe *ctx)
>  	return dpu_hw_get_scaler3_ver(&ctx->hw, idx);
>  }
> 
> -/**
> +/*
>   * dpu_hw_sspp_setup_rects()
>   */
>  static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,