[Freedreno] [PATCH 3/3] drm/msm/dpu: add support for clk and bw scaling for display

[kalyan_t at codeaurora.org]

On 2020-11-08 23:25, Amit Pundir wrote:
> On Tue, 4 Aug 2020 at 21:09, Rob Clark <robdclark at gmail.com> wrote:
>> 
>> On Thu, Jul 16, 2020 at 4:36 AM Kalyan Thota <kalyan_t at codeaurora.org> 
>> wrote:
>> >
>> > This change adds support to scale src clk and bandwidth as
>> > per composition requirements.
>> >
>> > Interconnect registration for bw has been moved to mdp
>> > device node from mdss to facilitate the scaling.
>> >
>> > Changes in v1:
>> >  - Address armv7 compilation issues with the patch (Rob)
>> >
>> > Signed-off-by: Kalyan Thota <kalyan_t at codeaurora.org>
>> 
>> Reviewed-by: Rob Clark <robdclark at chromium.org>
>> 
> 
> Hi Kalyan, Rob,
> 
> This patch broke the display on the PocoF1 phone
> (sdm845-xiaomi-beryllium.dts) running AOSP.
> I can boot to UI but the display is frozen soon after that and
> dmesg is full of following errors:
> 
> [drm:dpu_core_perf_crtc_update:397] [dpu error]crtc-65: failed to
> update bus bw vote
> [drm:dpu_core_perf_crtc_check:203] [dpu error]exceeds bandwidth:
> 7649746kb > 6800000kb
> [drm:dpu_crtc_atomic_check:969] [dpu error]crtc65 failed performance 
> check -7
> [drm:dpu_core_perf_crtc_check:203] [dpu error]exceeds bandwidth:
> 7649746kb > 6800000kb
> [drm:dpu_crtc_atomic_check:969] [dpu error]crtc65 failed performance 
> check -7
> [drm:dpu_core_perf_crtc_check:203] [dpu error]exceeds bandwidth:
> 7649746kb > 6800000kb
> [drm:dpu_crtc_atomic_check:969] [dpu error]crtc65 failed performance 
> check -7
> 
> Here is the full dmesg https://pastebin.ubuntu.com/p/PcSdNgMnYw/.
> Georgi pointed out following patch but it didn't help,
> https://lore.kernel.org/dri-devel/20201027102304.945424-1-dmitry.baryshkov@linaro.org/
> Am I missing any other followup fix?
> 
> Regards,
> Amit Pundir
> __

Hi Amit,

Apologies for the delay.

I have gone through the logs and referred to the below panel file for 
the timings.
https://github.com/Matheus-Garbelini/Kernel-Sphinx-Pocophone-F1/blob/master/arch/arm64/boot/dts/qcom/dsi-panel-tianma-fhd-nt36672a-video.dtsi

if the above is correct file, then below could be the possible root 
cause.

The panel back porch and pw is less and it is causing the prefill bw 
requirement to shoot up per layer as currently we are not considering 
front porch in the calculation. can you please try the attached patch in 
the email as a solution and provide me the feedback, i'll post it as a 
formal change.

Thanks,
Kalyan

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