[Freedreno] [PATCH] drm/msm/dp: add support of HBR3 link rate

Vinod Koul vkoul at kernel.org
Thu Feb 18 04:14:14 UTC 2021


On 17-02-21, 09:36, Stephen Boyd wrote:
> Quoting Kuogee Hsieh (2021-02-17 08:58:42)
> > Add hbr3_hbr2 voltage and pre-emphasis swing table to support
> > HBR3 link rate
> > 
> > Signed-off-by: Kuogee Hsieh <khsieh at codeaurora.org>
> > ---
> >  drivers/gpu/drm/msm/dp/dp_panel.c   |  4 ----
> >  drivers/phy/qualcomm/phy-qcom-qmp.c | 24 ++++++++++++++++++++++--
> 
> This spans to subsystems so at least you should run get_maintainers and
> include phy maintainers. Maybe it should be split into two patches too
> so it can go via different trees.

different patches for different subsytem unless we risk breaking bisect
should be general approach...

> 
> >  2 files changed, 22 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
> > index 9cc8166..63112fa 100644
> > --- a/drivers/gpu/drm/msm/dp/dp_panel.c
> > +++ b/drivers/gpu/drm/msm/dp/dp_panel.c
> > @@ -76,10 +76,6 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
> >         if (link_info->num_lanes > dp_panel->max_dp_lanes)
> >                 link_info->num_lanes = dp_panel->max_dp_lanes;
> >  
> > -       /* Limit support upto HBR2 until HBR3 support is added */
> > -       if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4)))
> > -               link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
> > -
> >         DRM_DEBUG_DP("version: %d.%d\n", major, minor);
> >         DRM_DEBUG_DP("link_rate=%d\n", link_info->rate);
> >         DRM_DEBUG_DP("lane_count=%d\n", link_info->num_lanes);
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > index 0939a9e..cc5ef59 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > @@ -2965,6 +2965,21 @@ static void qcom_qmp_phy_dp_aux_init(struct qmp_phy *qphy)
> >                qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK);
> >  }
> >  
> > +
> > +static u8 const qmp_dp_v3_pre_emphasis_hbr3_hbr2[4][4] = {
> 
> Should be static const u8 qmp_dp...
> 
> > +        {0x00, 0x0C, 0x15, 0x1A},
> > +        {0x02, 0x0E, 0x16, 0xFF},
> > +        {0x02, 0x11, 0xFF, 0xFF},
> > +        {0x04, 0xFF, 0xFF, 0xFF}
> > +};
> > +
> > +static u8 const qmp_dp_v3_voltage_swing_hbr3_hbr2[4][4] = {
> 
> Same.
> 
> > +        {0x02, 0x12, 0x16, 0x1A},
> 
> Please add a space after { and before } and use lowercase hex to match
> the qmp_dp_v3_pre_emphasis_hbr_rbr design.
> 
> > +        {0x09, 0x19, 0x1F, 0xFF},
> > +        {0x10, 0x1F, 0xFF, 0xFF},
> > +        {0x1F, 0xFF, 0xFF, 0xFF}
> > +};
> > +
> >  static const u8 qmp_dp_v3_pre_emphasis_hbr_rbr[4][4] = {
> >         { 0x00, 0x0c, 0x14, 0x19 },
> >         { 0x00, 0x0b, 0x12, 0xff },
> > @@ -3000,8 +3015,13 @@ static void qcom_qmp_phy_configure_dp_tx(struct qmp_phy *qphy)
> >                 drvr_en = 0x10;
> >         }
> >  
> > -       voltage_swing_cfg = qmp_dp_v3_voltage_swing_hbr_rbr[v_level][p_level];
> > -       pre_emphasis_cfg = qmp_dp_v3_pre_emphasis_hbr_rbr[v_level][p_level];
> > +       if (dp_opts->link_rate <= 2700) {
> > +               voltage_swing_cfg = qmp_dp_v3_voltage_swing_hbr_rbr[v_level][p_level];
> > +               pre_emphasis_cfg = qmp_dp_v3_pre_emphasis_hbr_rbr[v_level][p_level];
> > +       } else {
> > +               voltage_swing_cfg = qmp_dp_v3_voltage_swing_hbr3_hbr2[v_level][p_level];
> > +               pre_emphasis_cfg = qmp_dp_v3_pre_emphasis_hbr3_hbr2[v_level][p_level];
> > +       }

-- 
~Vinod


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