[Freedreno] [PATCH v1] drm/msm/dpu: Fix sm8250_mdp register length
AngeloGioacchino Del Regno
angelogioacchino.delregno at somainline.org
Mon Jun 28 09:42:19 UTC 2021
Il 28/06/21 10:50, Robert Foss ha scritto:
> The downstream dts lists this value as 0x494, and not
> 0x45c.
>
> Fixes: af776a3e1c30 ("drm/msm/dpu: add SM8250 to hw catalog")
> Signed-off-by: Robert Foss <robert.foss at linaro.org>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 189f3533525c..5d30c7f33930 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -244,7 +244,7 @@ static const struct dpu_mdp_cfg sc7180_mdp[] = {
> static const struct dpu_mdp_cfg sm8250_mdp[] = {
> {
> .name = "top_0", .id = MDP_TOP,
> - .base = 0x0, .len = 0x45C,
> + .base = 0x0, .len = 0x494,
> .features = 0,
> .highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
> .clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>
OK on Xperia 5 II (SM8250)
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at somainline.org>
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