[Freedreno] [PATCH v3 00/25] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers

[Stephen Boyd]

Quoting Dmitry Baryshkov (2021-03-27 04:02:40)
> Restructure MSM DSI PHY drivers. What started as an attempt to grok the
> overcomplicated PHY drivers, has lead up to the idea of merging PHY and
> PLL code, reducing abstractions, code duplication, dropping dead code,
> etc.
> 
> The patches were mainly tested on RB5 (sm8250, 7nm) and DB410c (apq8016,
> 28nm-lp) and lightly tested on RB3 (sdm845, 10nm).
> 
> The patch 'clk: fixed: add devm helper for clk_hw_register_fixed_factor()'
> is already a part of mainline as of 5.12-rc1, but is included here for
> completeness to fix compilation issues (as msm-next is based on 5.11-rc5).
> 
> Changes since v2:
>  - Drop the 'stop setting clock parents manually' patch for now together
>    with the dtsi changes. Unlike the rest of patchset it provides
>    functional changes and might require additional discussion.
>    The patchset will be resubmitted later.
> 
> Changes since v1:
>  - Rebase on top of msm/msm-next
>  - Reorder patches to follow logical sequence
>  - Add sc7180 clocks assignment
>  - Drop sm8250 clocks assignment, as respective file is not updated in
>    msm/msm-next
> 
> Changes since RFC:
>  - Reorder patches to move global clock patches in the beginning and
>    dtsi patches where they are required.
>  - remove msm_dsi_phy_set_src_pll() and guess src_pll_id using PHY usecase.
> 
> The following changes since commit 627dc55c273dab308303a5217bd3e767d7083ddb:
> 
>   drm/msm/disp/dpu1: icc path needs to be set before dpu runtime resume (2021-03-22 18:52:34 -0700)
> 
> are available in the Git repository at:
> 
>   https://git.linaro.org/people/dmitry.baryshkov/kernel.git dsi-phy-3

I tested this on sc7180 lazor and the display comes up

Tested-by: Stephen Boyd <swboyd at chromium.org>