[Freedreno] [PATCH v2 15/22] drm/msm/dpu: simplify DPU_SSPP features checks
abhinavk at codeaurora.org
abhinavk at codeaurora.org
Tue Nov 9 20:06:30 UTC 2021
On 2021-07-04 18:21, Dmitry Baryshkov wrote:
> Add DPU_SSPP_CSC_ANY denoting any CSC block. As we are at it, rewrite
> DPU_SSPP_SCALER (any scaler) to use BIT(x) instead of hand-coded
> bitshifts.
>
This can go independent of the multi-rect series, so can you please take
this with the
first half of the series which was going to be taken separately?
With that,
Reviewed-by: Abhinav Kumar <abhinavk at codeaurora.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 16 +++++++++++-----
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 3 +--
> 2 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> index 264a9d0d5fca..00098e33391e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> @@ -25,11 +25,17 @@ struct dpu_hw_pipe;
> /**
> * Define all scaler feature bits in catalog
> */
> -#define DPU_SSPP_SCALER ((1UL << DPU_SSPP_SCALER_RGB) | \
> - (1UL << DPU_SSPP_SCALER_QSEED2) | \
> - (1UL << DPU_SSPP_SCALER_QSEED3) | \
> - (1UL << DPU_SSPP_SCALER_QSEED3LITE) | \
> - (1UL << DPU_SSPP_SCALER_QSEED4))
> +#define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \
> + BIT(DPU_SSPP_SCALER_QSEED2) | \
> + BIT(DPU_SSPP_SCALER_QSEED3) | \
> + BIT(DPU_SSPP_SCALER_QSEED3LITE) | \
> + BIT(DPU_SSPP_SCALER_QSEED4))
> +
> +/*
> + * Define all CSC feature bits in catalog
> + */
> +#define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \
> + BIT(DPU_SSPP_CSC_10BIT))
>
> /**
> * Component indices
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 34ecd971cbbb..8ed7b8f0db69 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -983,8 +983,7 @@ static int dpu_plane_atomic_check(struct drm_plane
> *plane,
>
> if (DPU_FORMAT_IS_YUV(fmt) &&
> (!(pdpu->pipe_hw->cap->features & DPU_SSPP_SCALER) ||
> - !(pdpu->pipe_hw->cap->features & (BIT(DPU_SSPP_CSC)
> - | BIT(DPU_SSPP_CSC_10BIT))))) {
> + !(pdpu->pipe_hw->cap->features & DPU_SSPP_CSC_ANY))) {
> DPU_DEBUG_PLANE(pdpu,
> "plane doesn't have scaler/csc for yuv\n");
> return -EINVAL;
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