[Freedreno] [PATCH v2 05/17] drm/msm/dpu: add reset_intf_cfg operation for dpu_hw_ctl

Dmitry Baryshkov dmitry.baryshkov at linaro.org
Wed Apr 20 07:02:18 UTC 2022


On 20/04/2022 04:45, Abhinav Kumar wrote:
> Add a reset_intf_cfg operation for dpu_hw_ctl to reset the
> entire CTL path by disabling each component namely layer mixer,
> 3d-merge and interface blocks.
> 
> Signed-off-by: Abhinav Kumar <quic_abhinavk at quicinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 32 ++++++++++++++++++++++++++++++
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h |  8 ++++++++
>   2 files changed, 40 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> index dc27579..524f024 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> @@ -563,6 +563,37 @@ static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx,
>   	DPU_REG_WRITE(c, CTL_TOP, intf_cfg);
>   }
>   
> +static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx,
> +		struct dpu_hw_intf_cfg *cfg)
> +{
> +	struct dpu_hw_blk_reg_map *c = &ctx->hw;
> +	u32 intf_active = 0;
> +	u32 merge3d_active = 0;
> +
> +	/*
> +	 * This API resets each portion of the CTL path namely,
> +	 * clearing the sspps staged on the lm, merge_3d block,
> +	 * interfaces etc to ensure clean teardown of the pipeline.
> +	 * This will be used for writeback to begin with to have a
> +	 * proper teardown of the writeback session but upon further
> +	 * validation, this can be extended to all interfaces.
> +	 */
> +	if (cfg->merge_3d) {
> +		merge3d_active = DPU_REG_READ(c, CTL_MERGE_3D_ACTIVE);
> +		merge3d_active &= ~BIT(cfg->merge_3d - MERGE_3D_0);
> +		DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE,
> +				merge3d_active);
> +	}
> +
> +	dpu_hw_ctl_clear_all_blendstages(ctx);
> +
> +	if (cfg->intf) {
> +		intf_active = DPU_REG_READ(c, CTL_INTF_ACTIVE);
> +		intf_active &= ~BIT(cfg->intf - INTF_0);
> +		DPU_REG_WRITE(c, CTL_INTF_ACTIVE, intf_active);
> +	}
> +}
> +
>   static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx,
>   	unsigned long *fetch_active)
>   {
> @@ -586,6 +617,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
>   	if (cap & BIT(DPU_CTL_ACTIVE_CFG)) {
>   		ops->trigger_flush = dpu_hw_ctl_trigger_flush_v1;
>   		ops->setup_intf_cfg = dpu_hw_ctl_intf_cfg_v1;
> +		ops->reset_intf_cfg = dpu_hw_ctl_reset_intf_cfg_v1;
>   		ops->update_pending_flush_intf =
>   			dpu_hw_ctl_update_pending_flush_intf_v1;
>   		ops->update_pending_flush_merge_3d =
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> index 97f326d..c61a8fd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> @@ -140,6 +140,14 @@ struct dpu_hw_ctl_ops {
>   	void (*setup_intf_cfg)(struct dpu_hw_ctl *ctx,
>   		struct dpu_hw_intf_cfg *cfg);
>   
> +	/**
> +	 * reset ctl_path interface config
> +	 * @ctx    : ctl path ctx pointer
> +	 * @cfg    : interface config structure pointer
> +	 */
> +	void (*reset_intf_cfg)(struct dpu_hw_ctl *ctx,
> +			struct dpu_hw_intf_cfg *cfg);
> +
>   	int (*reset)(struct dpu_hw_ctl *c);
>   
>   	/*


-- 
With best wishes
Dmitry


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