[Freedreno] [PATCH RESEND] drm/msm/dsi: fix the inconsistent indenting
Abhinav Kumar
quic_abhinavk at quicinc.com
Fri Jul 8 16:03:43 UTC 2022
On 7/7/2022 5:58 PM, sunliming wrote:
> Fix the inconsistent indenting in function msm_dsi_dphy_timing_calc_v3().
>
> Fix the following smatch warnings:
>
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:350 msm_dsi_dphy_timing_calc_v3() warn: inconsistent indenting
>
> Reported-by: kernel test robot <lkp at intel.com>
> Signed-off-by: sunliming <sunliming at kylinos.cn>
Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index a39de3bdc7fa..56dfa2d24be1 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -347,7 +347,7 @@ int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing,
> } else {
> timing->shared_timings.clk_pre =
> linear_inter(tmax, tmin, pcnt2, 0, false);
> - timing->shared_timings.clk_pre_inc_by_2 = 0;
> + timing->shared_timings.clk_pre_inc_by_2 = 0;
> }
>
> timing->ta_go = 3;
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