[Freedreno] [PATCH v2 2/6] arm64: dts: qcom: sdm630: Drop flags for mdss irqs

Abhinav Kumar quic_abhinavk at quicinc.com
Wed Mar 2 23:48:04 UTC 2022



On 3/2/2022 2:54 PM, Dmitry Baryshkov wrote:
> The number of interrupt cells for the mdss interrupt controller is 1,
> meaning there should only be one cell for the interrupt number, not two.
> Drop the second cell containing (unused) irq flags.
> 
> Reviewed-by: Stephen Boyd <swboyd at chromium.org>
> Fixes: b52555d590d1 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 240293592ef9..7f875bf9390a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1453,7 +1453,7 @@ mdp: mdp at c901000 {
>   				reg-names = "mdp_phys";
>   
>   				interrupt-parent = <&mdss>;
> -				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <0>;
>   
>   				assigned-clocks = <&mmcc MDSS_MDP_CLK>,
>   						  <&mmcc MDSS_VSYNC_CLK>;
> @@ -1530,7 +1530,7 @@ dsi0: dsi at c994000 {
>   				power-domains = <&rpmpd SDM660_VDDCX>;
>   
>   				interrupt-parent = <&mdss>;
> -				interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <4>;
>   
>   				assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
>   						  <&mmcc PCLK0_CLK_SRC>;


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