[Freedreno] [PATCH v2 3/6] arm64: dts: qcom: sdm660: Drop flags for mdss irqs
Abhinav Kumar
quic_abhinavk at quicinc.com
Wed Mar 2 23:48:17 UTC 2022
On 3/2/2022 2:54 PM, Dmitry Baryshkov wrote:
> The number of interrupt cells for the mdss interrupt controller is 1,
> meaning there should only be one cell for the interrupt number, not two.
> Drop the second cell containing (unused) irq flags.
>
> Reviewed-by: Stephen Boyd <swboyd at chromium.org>
> Fixes: ab290284398d ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sdm660.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi
> index eccf6fde16b4..1d748c5305f4 100644
> --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
> @@ -163,7 +163,7 @@ dsi1: dsi at c996000 {
> power-domains = <&rpmpd SDM660_VDDCX>;
>
> interrupt-parent = <&mdss>;
> - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <5>;
>
> assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
> <&mmcc PCLK1_CLK_SRC>;
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