[Freedreno] [PATCH v2] drm/msm/dp: force link training for display resolution change

[kernel test robot]

Hi Kuogee,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on next-20220526]
[cannot apply to v5.18]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Kuogee-Hsieh/drm-msm-dp-force-link-training-for-display-resolution-change/20220527-071202
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: sparc-allmodconfig (https://download.01.org/0day-ci/archive/20220527/202205271424.ApfrMbAm-lkp@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/42816831cad7ced23cdedbb77ef2ebf13247c623
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Kuogee-Hsieh/drm-msm-dp-force-link-training-for-display-resolution-change/20220527-071202
        git checkout 42816831cad7ced23cdedbb77ef2ebf13247c623
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=sparc SHELL=/bin/bash drivers/gpu/drm/msm/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp at intel.com>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/msm/dp/dp_ctrl.c: In function 'dp_ctrl_on_stream':
>> drivers/gpu/drm/msm/dp/dp_ctrl.c:1852:13: error: 'force_link_tarin' undeclared (first use in this function); did you mean 'force_link_train'?
    1852 |         if (force_link_tarin || !dp_ctrl_channel_eq_ok(ctrl))
         |             ^~~~~~~~~~~~~~~~
         |             force_link_train
   drivers/gpu/drm/msm/dp/dp_ctrl.c:1852:13: note: each undeclared identifier is reported only once for each function it appears in


vim +1852 drivers/gpu/drm/msm/dp/dp_ctrl.c

  1810	
  1811	int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train)
  1812	{
  1813		int ret = 0;
  1814		bool mainlink_ready = false;
  1815		struct dp_ctrl_private *ctrl;
  1816		unsigned long pixel_rate_orig;
  1817	
  1818		if (!dp_ctrl)
  1819			return -EINVAL;
  1820	
  1821		ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
  1822	
  1823		ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock;
  1824	
  1825		pixel_rate_orig = ctrl->dp_ctrl.pixel_rate;
  1826		if (dp_ctrl->wide_bus_en)
  1827			ctrl->dp_ctrl.pixel_rate >>= 1;
  1828	
  1829		drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%d\n",
  1830			ctrl->link->link_params.rate,
  1831			ctrl->link->link_params.num_lanes, ctrl->dp_ctrl.pixel_rate);
  1832	
  1833		if (!dp_power_clk_status(ctrl->power, DP_CTRL_PM)) { /* link clk is off */
  1834			ret = dp_ctrl_enable_mainlink_clocks(ctrl);
  1835			if (ret) {
  1836				DRM_ERROR("Failed to start link clocks. ret=%d\n", ret);
  1837				goto end;
  1838			}
  1839		}
  1840	
  1841		ret = dp_ctrl_enable_stream_clocks(ctrl);
  1842		if (ret) {
  1843			DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret);
  1844			goto end;
  1845		}
  1846	
  1847		if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) {
  1848			dp_ctrl_send_phy_test_pattern(ctrl);
  1849			return 0;
  1850		}
  1851	
> 1852		if (force_link_tarin || !dp_ctrl_channel_eq_ok(ctrl))
  1853			dp_ctrl_link_retrain(ctrl);
  1854	
  1855		/* stop txing train pattern to end link training */
  1856		dp_ctrl_clear_training_pattern(ctrl);
  1857	
  1858		/*
  1859		 * Set up transfer unit values and set controller state to send
  1860		 * video.
  1861		 */
  1862		reinit_completion(&ctrl->video_comp);
  1863	
  1864		dp_ctrl_configure_source_params(ctrl);
  1865	
  1866		dp_catalog_ctrl_config_msa(ctrl->catalog,
  1867			ctrl->link->link_params.rate,
  1868			pixel_rate_orig, dp_ctrl_use_fixed_nvid(ctrl));
  1869	
  1870		dp_ctrl_setup_tr_unit(ctrl);
  1871	
  1872		dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO);
  1873	
  1874		ret = dp_ctrl_wait4video_ready(ctrl);
  1875		if (ret)
  1876			return ret;
  1877	
  1878		mainlink_ready = dp_catalog_ctrl_mainlink_ready(ctrl->catalog);
  1879		drm_dbg_dp(ctrl->drm_dev,
  1880			"mainlink %s\n", mainlink_ready ? "READY" : "NOT READY");
  1881	
  1882	end:
  1883		return ret;
  1884	}
  1885	

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