[Freedreno] [PATCH v1 4/5] arm64: dts: qcom: sm8450-hdk: Add LT9611uxc HDMI bridge
Konrad Dybcio
konrad.dybcio at somainline.org
Fri Nov 4 14:17:55 UTC 2022
On 04/11/2022 14:13, Dmitry Baryshkov wrote:
> From: Vinod Koul <vkoul at kernel.org>
>
> Add the LT9611uxc DSI-HDMI bridge and supplies
>
> Signed-off-by: Vinod Koul <vkoul at kernel.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 61 +++++++++++++++++++++++++
> 1 file changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index e1a4cf1ee51d..9522dd29a38a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -20,6 +20,28 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + lt9611_1v2: lt9611-vdd12-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "LT9611_1V2";
> +
> + vin-supply = <&vph_pwr>;
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + lt9611_3v3: lt9611-3v3 {
The previous node has -regulator, this one doesn't, please keep it
consistent.
> + compatible = "regulator-fixed";
> + regulator-name = "LT9611_3V3";
> +
> + vin-supply = <&vreg_bob>;
> + gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + };
> +
> vph_pwr: vph-pwr-regulator {
> compatible = "regulator-fixed";
> regulator-name = "vph_pwr";
> @@ -349,6 +371,27 @@ vreg_l7e_2p8: ldo7 {
> };
> };
>
> +&i2c9 {
> + status = "okay";
> + clock-frequency = <400000>;
Status last, please.
With these fixes:
Reviewed-by: Konrad Dybcio <konrad.dybcio at somainline.org>
Konrad
> +
> + lt9611_codec: hdmi-bridge at 2b {
> + compatible = "lontium,lt9611uxc";
> + reg = <0x2b>;
> +
> + interrupts-extended = <&tlmm 44 IRQ_TYPE_EDGE_FALLING>;
> +
> + reset-gpios = <&tlmm 107 GPIO_ACTIVE_HIGH>;
> +
> + vdd-supply = <<9611_1v2>;
> + vcc-supply = <<9611_3v3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <<9611_irq_pin <9611_rst_pin>;
> +
> + };
> +};
> +
> &pcie0 {
> status = "okay";
> max-link-speed = <2>;
> @@ -394,8 +437,26 @@ &qupv3_id_0 {
> status = "okay";
> };
>
> +&qupv3_id_1 {
> + status = "okay";
> +};
> +
> &tlmm {
> gpio-reserved-ranges = <28 4>, <36 4>;
> +
> + lt9611_irq_pin: lt9611-irq {
> + pins = "gpio44";
> + function = "gpio";
> + bias-disable;
> + };
> +
> + lt9611_rst_pin: lt9611-rst-state {
> + pins = "gpio107";
> + function = "normal";
> +
> + output-high;
> + input-disable;
> + };
> };
>
> &uart7 {
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