[Freedreno] [RFC PATCH 8/9] iommu/arm-smmu-qcom: Stop using mmu500 reset for v2 MMUs

[Sai Prakash Ranjan]

On 10/21/2022 10:25 PM, Dmitry Baryshkov wrote:
> The arm_mmu500_reset() writes into registers specific for MMU500. For
> the generic ARM SMMU v2 these registers (sACR) are defined as
> 'implementation defined'. Downstream Qualcomm driver for SMMUv2 doesn't
> touch them.
> 

Reviewed-by: Sai Prakash Ranjan <quic_saipraka at quicinc.com>
Tested-by: Sai Prakash Ranjan <quic_saipraka at quicinc.com>

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 41 ++++++++++++++++------
>   1 file changed, 31 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 20cbb39cb670..9abc40c00f3e 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -376,7 +376,15 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu)
>   	return ret;
>   }
>   
> -static const struct arm_smmu_impl qcom_smmu_impl = {
> +static const struct arm_smmu_impl qcom_smmu_v2_impl = {
> +	.init_context = qcom_smmu_init_context,
> +	.cfg_probe = qcom_smmu_cfg_probe,
> +	.def_domain_type = qcom_smmu_def_domain_type,
> +	.write_s2cr = qcom_smmu_write_s2cr,
> +	.tlb_sync = qcom_smmu_tlb_sync,
> +};
> +
> +static const struct arm_smmu_impl qcom_smmu_500_impl = {
>   	.init_context = qcom_smmu_init_context,
>   	.cfg_probe = qcom_smmu_cfg_probe,
>   	.def_domain_type = qcom_smmu_def_domain_type,
> @@ -394,7 +402,15 @@ static const struct arm_smmu_impl sdm845_smmu_500_impl = {
>   	.tlb_sync = qcom_smmu_tlb_sync,
>   };
>   
> -static const struct arm_smmu_impl qcom_adreno_smmu_impl = {
> +static const struct arm_smmu_impl qcom_adreno_smmu_v2_impl = {
> +	.init_context = qcom_adreno_smmu_init_context,
> +	.def_domain_type = qcom_smmu_def_domain_type,
> +	.alloc_context_bank = qcom_adreno_smmu_alloc_context_bank,
> +	.write_sctlr = qcom_adreno_smmu_write_sctlr,
> +	.tlb_sync = qcom_smmu_tlb_sync,
> +};
> +
> +static const struct arm_smmu_impl qcom_adreno_smmu_500_impl = {
>   	.init_context = qcom_adreno_smmu_init_context,
>   	.def_domain_type = qcom_smmu_def_domain_type,
>   	.reset = arm_mmu500_reset,
> @@ -452,12 +468,17 @@ static const struct qcom_smmu_config qcom_smmu_impl0_cfg = {
>    */
>   static const struct qcom_smmu_match_data msm8996_smmu_data = {
>   	.impl = NULL,
> -	.adreno_impl = &qcom_adreno_smmu_impl,
> +	.adreno_impl = &qcom_adreno_smmu_v2_impl,
> +};
> +
> +static const struct qcom_smmu_match_data qcom_smmu_v2_data = {
> +	.impl = &qcom_smmu_v2_impl,
> +	.adreno_impl = &qcom_adreno_smmu_v2_impl,
>   };
>   
>   static const struct qcom_smmu_match_data qcom_smmu_data = {
> -	.impl = &qcom_smmu_impl,
> -	.adreno_impl = &qcom_adreno_smmu_impl,
> +	.impl = &qcom_smmu_500_impl,
> +	.adreno_impl = &qcom_adreno_smmu_500_impl,
>   };
>   
>   static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
> @@ -467,21 +488,21 @@ static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
>   };
>   
>   static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
> -	.impl = &qcom_smmu_impl,
> -	.adreno_impl = &qcom_adreno_smmu_impl,
> +	.impl = &qcom_smmu_500_impl,
> +	.adreno_impl = &qcom_adreno_smmu_500_impl,
>   	.cfg = &qcom_smmu_impl0_cfg,
>   };
>   
>   static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
>   	{ .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
> -	{ .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
> +	{ .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_v2_data },
>   	{ .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
>   	{ .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
>   	{ .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
>   	{ .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
>   	{ .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
> -	{ .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
> -	{ .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
> +	{ .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_v2_data },
> +	{ .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data },
>   	{ .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
>   	{ .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
>   	{ .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },