[Freedreno] [PATCH 1/2] drm/msm/dpu: Add support for XR30 format

[Rob Clark]

On Thu, Sep 1, 2022 at 1:34 PM Jessica Zhang <quic_jesszhan at quicinc.com> wrote:
>
> Add support for XR30 color format. This supports both linear and
> compressed formats.
>
> Signed-off-by: Jessica Zhang <quic_jesszhan at quicinc.com>

Reviewed-by: Rob Clark <robdclark at gmail.com>

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c    | 7 +++++++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c      | 1 +
>  3 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> index f436a1f3419d..57971c08f57c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> @@ -524,6 +524,12 @@ static const struct dpu_format dpu_format_map_ubwc[] = {
>                 true, 4, DPU_FORMAT_FLAG_DX | DPU_FORMAT_FLAG_COMPRESSED,
>                 DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
>
> +       INTERLEAVED_RGB_FMT_TILED(XRGB2101010,
> +               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
> +               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
> +               true, 4, DPU_FORMAT_FLAG_DX | DPU_FORMAT_FLAG_COMPRESSED,
> +               DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
> +
>         PSEUDO_YUV_FMT_TILED(NV12,
>                 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
>                 C1_B_Cb, C2_R_Cr,
> @@ -571,6 +577,7 @@ static int _dpu_format_get_media_color_ubwc(const struct dpu_format *fmt)
>                 {DRM_FORMAT_XBGR8888, COLOR_FMT_RGBA8888_UBWC},
>                 {DRM_FORMAT_XRGB8888, COLOR_FMT_RGBA8888_UBWC},
>                 {DRM_FORMAT_ABGR2101010, COLOR_FMT_RGBA1010102_UBWC},
> +               {DRM_FORMAT_XRGB2101010, COLOR_FMT_RGBA1010102_UBWC},
>                 {DRM_FORMAT_XBGR2101010, COLOR_FMT_RGBA1010102_UBWC},
>                 {DRM_FORMAT_BGR565, COLOR_FMT_RGB565_UBWC},
>         };
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 0239a811d5ec..53b6edb2f563 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -156,6 +156,7 @@ static const uint32_t plane_formats[] = {
>         DRM_FORMAT_RGBX8888,
>         DRM_FORMAT_BGRX8888,
>         DRM_FORMAT_XBGR8888,
> +       DRM_FORMAT_XRGB2101010,
>         DRM_FORMAT_RGB888,
>         DRM_FORMAT_BGR888,
>         DRM_FORMAT_RGB565,
> @@ -184,6 +185,7 @@ static const uint32_t plane_formats_yuv[] = {
>         DRM_FORMAT_RGBA8888,
>         DRM_FORMAT_BGRX8888,
>         DRM_FORMAT_BGRA8888,
> +       DRM_FORMAT_XRGB2101010,
>         DRM_FORMAT_XRGB8888,
>         DRM_FORMAT_XBGR8888,
>         DRM_FORMAT_RGBX8888,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index a617a3d8b1bc..60ea834dc8d6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -69,6 +69,7 @@ static const uint32_t qcom_compressed_supported_formats[] = {
>         DRM_FORMAT_ARGB8888,
>         DRM_FORMAT_XBGR8888,
>         DRM_FORMAT_XRGB8888,
> +       DRM_FORMAT_XRGB2101010,
>         DRM_FORMAT_BGR565,
>
>         DRM_FORMAT_NV12,
> --
> 2.35.1
>