[Freedreno] [PATCH v4 03/42] drm/msm/dpu: Allow variable INTF_BLK size

[Abhinav Kumar]

On 4/4/2023 5:37 PM, Dmitry Baryshkov wrote:
> On 05/04/2023 01:30, Abhinav Kumar wrote:
>>
>>
>> On 4/4/2023 6:05 AM, Dmitry Baryshkov wrote:
>>> From: Konrad Dybcio <konrad.dybcio at linaro.org>
>>>
>>> These blocks are of variable length on different SoCs. Set the
>>> correct values where I was able to retrieve it from downstream
>>> DTs and leave the old defaults (0x280) otherwise.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>>> [DB: fixed some lengths, split the INTF changes away]
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>
>> Everything is fine except sm8250.
>>
>> DPU | SoC      | INTF_DSI size
>> 5.0 | sm8150   | 0x2bc
>> 5.1 | sc8180x  | 0x2bc
>> 6.0 | sm8250   | 0x2c0
>> 6.2 | sc7180   | 0x2c0
>> 6.3 | sm6115   | 0x2c0
>> 6.5 | qcm2290  | 0x2c0
>> 7.0 | sm8350   | 0x2c4
>> 7.2 | sc7280   | 0x2c4
>> 8.0 | sc8280xp | 0x300
>> 8.1 | sm8450   | 0x300
>> 9.0 | sm8550   | 0x300
>>
>> Today sm8250 is using the same table as sm8150 but it needs 0x2c0 and 
>> not 0x2bc.
>>
>> We should de-duplicate it add a new one for sm8250?
> 
> This is done in patch 22. It makes no sense to play with the data until 
> we are clear, which platform uses which instance.
> 

Ack, that one looks fine and since this one is just preserving what was 
already present, this change LGTM, hence

Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>