[Freedreno] [PATCH v5 4/4] drm/msm/dpu: use CTL_SC7280_MASK for sm8450's ctl_0

[Abhinav Kumar]

On 4/7/2023 5:27 PM, Dmitry Baryshkov wrote:
> On sm8450 platform the CTL_0 doesn't differ from the rest of CTL blocks,
> so switch it to CTL_SC7280_MASK too.
> 
> Some background: original commit 100d7ef6995d ("drm/msm/dpu: add support
> for SM8450") had all (relevant at that time) bit spelled individually.
> Then commit 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog"),
> despite being a mismerge, correctly changed all other CTL entries to use
> CTL_SC7280_MASK, except CTL_0.
> 
> While the current BLOCK_SOC_MASK style is not ideal (and while we are
> working on a better scheme), let's follow its usage as a least minimal
> surprise. For example, sc8280xp, a close associate of sm8450, also uses
> CTL_SC7280_MASK.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---

Although I dont totally agree with this, but because sc8280xp also uses 
the same, I am fine.


Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>

But either we need to work on a better scheme or expand the macros but 
not duplicate these for the next chipset which gets added.