[Freedreno] [PATCH v2 4/5] drm/msm/mdss: Handle the reg bus ICC path

[Georgi Djakov]

Hi Konrad,

On 18.04.23 15:10, Konrad Dybcio wrote:
> Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's
> another path that needs to be handled to ensure MDSS functions properly,
> namely the "reg bus", a.k.a the CPU-MDSS interconnect.
> 
> Gating that path may have a variety of effects.. from none to otherwise
> inexplicable DSI timeouts..
> 
> On the MDSS side, we only have to ensure that it's on at what Qualcomm
> downstream calls "77 MHz", a.k.a 76.8 Mbps and turn it off at suspend.
> 
> To achieve that, make msm_mdss_icc_request_bw() accept a boolean to
> indicate whether we want the busses to be on or off, as this function's
> only use is to vote for minimum or no bandwidth at all.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
> ---
>   drivers/gpu/drm/msm/msm_mdss.c | 17 +++++++++++++----
>   1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
[..]
> -static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw)
> +static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, bool enable)
>   {
>   	int i;
>   
>   	for (i = 0; i < msm_mdss->num_mdp_paths; i++)
> -		icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw));
> +		icc_set_bw(msm_mdss->mdp_path[i], 0, enable ? Bps_to_icc(MIN_IB_BW) : 0);
> +
> +	if (msm_mdss->reg_bus_path)
> +		icc_set_bw(msm_mdss->reg_bus_path, 0, enable ? 76800 : 0);

Please use Bps_to_icc, kbps_to_icc or any of the other macros.

BR,
Georgi