[Freedreno] [PATCH v5 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ

[Dmitry Baryshkov]

On Wed, 02 Aug 2023 13:04:18 +0300, Dmitry Baryshkov wrote:
> Having an explicit init of interrupt fields to -1 for not existing IRQs
> makes it easier to forget and/or miss such initialisation, resulting in
> a wrong interrupt definition.
> 
> Instead shift all IRQ indices to turn '0' to be the non-existing IRQ.
> 
> Dependencies: [1]
> 
> [...]

Applied, thanks!

[1/8] drm/msm/dpu: fix the irq index in dpu_encoder_phys_wb_wait_for_commit_done
      https://gitlab.freedesktop.org/lumag/msm/-/commit/d93cf453f51d

Best regards,
-- 
Dmitry Baryshkov <dmitry.baryshkov at linaro.org>