[PATCH 0/2] Add param for the highest bank bit

[Connor Abbott]

The highest bank bit is a parameter that influences the Adreno tiling
scheme. It is programmed by the kernel, and is supposed to be based on
the DRAM configuration. In order for Mesa to tile/until images itself,
it needs to know this parameter, and because it's programmed by the
kernel, the kernel should be the source of truth.

Mesa series: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26578

Connor Abbott (2):
  drm/msm: Refactor UBWC config setting
  drm/msm: Add param for the highest bank bit

 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  21 ++---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 101 +++++++++++++-----------
 drivers/gpu/drm/msm/adreno/adreno_gpu.c |   3 +
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |   9 +++
 include/uapi/drm/msm_drm.h              |   1 +
 5 files changed, 82 insertions(+), 53 deletions(-)

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2.31.1