[Freedreno] [PATCH 0/2] drm/msm/dpu: INTF CRC configuration cleanups and fix

Jessica Zhang quic_jesszhan at quicinc.com
Wed Dec 13 02:37:08 UTC 2023



On 11/30/2023 11:39 PM, Dmitry Baryshkov wrote:
> On Fri, 1 Dec 2023 at 03:31, Jessica Zhang <quic_jesszhan at quicinc.com> wrote:
>>
>> This series drops the frame_count and enable parameters (as they're always
>> set to the same value). It also sets input_sel=0x1 for INTF.
>>
>> Signed-off-by: Jessica Zhang <quic_jesszhan at quicinc.com>
>> ---
>> Jessica Zhang (2):
>>        drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr()
>>        drm/msm/dpu: Set input_sel bit for INTF
> 
> Please change the order of the commits: fix (input_sel) comes first,
> then comes the improvement.
> Otherwise if one needs to backport this fix, they either need to pick
> up the irrelevant patch, or they have to rework the fix.

Acked.

Thanks,

Jessica Zhang

> 
>>
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c    |  4 ++--
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  4 ++--
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c |  6 +++---
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h |  4 ++--
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c   |  6 +++---
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h   |  3 ++-
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 18 +++++++-----------
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 11 +++++------
>>   8 files changed, 26 insertions(+), 30 deletions(-)
>> ---
>> base-commit: 4047f50eb64d980fcd581a19bbe6164dab25ebc7
>> change-id: 20231122-encoder-fixup-61c190b16085
>>
>> Best regards,
>> --
>> Jessica Zhang <quic_jesszhan at quicinc.com>
>>
> 
> 
> -- 
> With best wishes
> Dmitry


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