[Freedreno] [PATCH v2 14/50] drm/msm/dpu: Allow variable SSPP/INTF_BLK size

Dmitry Baryshkov dmitry.baryshkov at linaro.org
Mon Feb 13 11:18:42 UTC 2023


On 13/02/2023 13:01, Konrad Dybcio wrote:
> 
> 
> On 12.02.2023 00:12, Dmitry Baryshkov wrote:
>> From: Konrad Dybcio <konrad.dybcio at linaro.org>
>>
>> These blocks are of variable length on different SoCs. Set the
>> correct values where I was able to retrieve it from downstream
>> DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
>> intf) otherwise.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>> [DB: fixed some of lengths]
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>> ---
> Oh you fixed it quicker than I could respond!

Yes, I wanted to include it into this patchset, so I had to fix it.

> 
> Still, I think the 8280 sspp size should not be
> 2x the norm..

Let's doublecheck this with somebody having access to docs.

-- 
With best wishes
Dmitry



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