[Freedreno] [PATCH v3 10/15] drm/msm/a6xx: Fix A680 highest bank bit value

[Konrad Dybcio]

According to the vendor sources, it's equal to 16, which makes hbb_lo
equal to 3.

Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list")
Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index b5017c56fa1b..2c4afecdd213 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
 		hbb_lo = 2;
 	}
 
-	if (adreno_is_a640_family(adreno_gpu)) {
+	if (adreno_is_a640(adreno_gpu)) {
 		amsbc = 1;
 		/* HBB = 15 */
 		hbb_lo = 2;
 	}
 
+	if (adreno_is_a680(adreno_gpu)) {
+		amsbc = 1;
+		/* HBB = 16 */
+		hbb_lo = 3;
+	}
+
 	if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) {
 		amsbc = 1;
 		/* TODO: get ddr type from bootloader and use 2 for LPDDR4 */

-- 
2.39.2