[Freedreno] [PATCH v2] drm/msm/dpu: add missing ubwc_swizzle setting to catalog

[Abhinav Kumar]

On 1/22/2023 10:24 PM, Dmitry Baryshkov wrote:
> Use the values from the vendor DTs to set ubwc_swizzle in the catalog.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>

Matches all the vendor DTs, hence

Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>

> ---
> 
> Changes since v1:
> - Added data for sc7280 and sm8550
> 
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index e45799e9fe49..b16e550fc4b6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -580,6 +580,7 @@ static const struct dpu_mdp_cfg sm6115_mdp[] = {
>   	.base = 0x0, .len = 0x494,
>   	.features = 0,
>   	.highest_bank_bit = 0x1,
> +	.ubwc_swizzle = 0x7,
>   	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>   		.reg_off = 0x2ac, .bit_off = 0},
>   	.clk_ctrls[DPU_CLK_CTRL_DMA0] = {
> @@ -593,6 +594,7 @@ static const struct dpu_mdp_cfg sm8250_mdp[] = {
>   	.base = 0x0, .len = 0x494,
>   	.features = 0,
>   	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
> +	.ubwc_swizzle = 0x6,
>   	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>   			.reg_off = 0x2AC, .bit_off = 0},
>   	.clk_ctrls[DPU_CLK_CTRL_VIG1] = {
> @@ -649,6 +651,7 @@ static const struct dpu_mdp_cfg sm8450_mdp[] = {
>   	.base = 0x0, .len = 0x494,
>   	.features = BIT(DPU_MDP_PERIPH_0_REMOVED),
>   	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
> +	.ubwc_swizzle = 0x6,
>   	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>   			.reg_off = 0x2AC, .bit_off = 0},
>   	.clk_ctrls[DPU_CLK_CTRL_VIG1] = {
> @@ -675,6 +678,7 @@ static const struct dpu_mdp_cfg sc7280_mdp[] = {
>   	.name = "top_0", .id = MDP_TOP,
>   	.base = 0x0, .len = 0x2014,
>   	.highest_bank_bit = 0x1,
> +	.ubwc_swizzle = 0x6,
>   	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>   		.reg_off = 0x2AC, .bit_off = 0},
>   	.clk_ctrls[DPU_CLK_CTRL_DMA0] = {
> @@ -711,6 +715,7 @@ static const struct dpu_mdp_cfg sm8550_mdp[] = {
>   	.base = 0, .len = 0x494,
>   	.features = BIT(DPU_MDP_PERIPH_0_REMOVED),
>   	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
> +	.ubwc_swizzle = 0x6,
>   	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
>   			.reg_off = 0x4330, .bit_off = 0},
>   	.clk_ctrls[DPU_CLK_CTRL_VIG1] = {