[Freedreno] [v2, 37/50] drm/msm/dpu: enable DPU_CTL_SPLIT_DISPLAY for sc8280xp

[Dmitry Baryshkov]

On 30/03/2023 15:29, Konrad Dybcio wrote:
> 
> 
> On 12.02.2023 00:12, Dmitry Baryshkov wrote:
>> Theoretically since sm8150 we should be using a single CTL for the
>> source split case, but since we do not support it for now, fallback to
>> DPU_CTL_SPLIT_DISPLAY.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>> ---
> Hmm.. so is it a software construct? E.g. "pass half of the data to
> each of the INTFs and tell them to cooperate"?

It is not a fully software construct, if I understand correctly. You 
have to program either a single CTL or two CTLs for a flush.

> 
> Apart from that, since it's temporary, I think it deserves a comment
> reminding us to fix it eventually™

Sure, this is, I think, a next item on my plate after getting all of 
wide planes and catalog in: to rework CTL support for sm8150+.

> 
> Konrad
>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>> index a3a79d908451..094876b1019b 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>> @@ -47,13 +47,13 @@ static const struct dpu_ctl_cfg sc8280xp_ctl[] = {
>>   	{
>>   	.name = "ctl_0", .id = CTL_0,
>>   	.base = 0x15000, .len = 0x204,
>> -	.features = CTL_SC7280_MASK,
>> +	.features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
>>   	.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
>>   	},
>>   	{
>>   	.name = "ctl_1", .id = CTL_1,
>>   	.base = 0x16000, .len = 0x204,
>> -	.features = CTL_SC7280_MASK,
>> +	.features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
>>   	.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
>>   	},
>>   	{

-- 
With best wishes
Dmitry