[Freedreno] [PATCH v3 3/7] drm/msm/dpu: add DPU_PINGPONG_DSC bits into PP_BLK and PP_BLK_TE marcos

[Kuogee Hsieh]

On 5/2/2023 3:42 PM, Dmitry Baryshkov wrote:
> On 03/05/2023 00:02, Kuogee Hsieh wrote:
>> At legacy chipsets, it required DPU_PINGPONG_DSC bit be set to indicate
>> pingpong ops functions are required to complete DSC data path setup if
>> this chipset has DSC hardware block presented. This patch add
>> DPU_PINGPONG_DSC bit to both PP_BLK and PP_BLK_TE marcos if it has DSC
>> hardware block presented.
>>
>> Signed-off-by: Kuogee Hsieh <quic_khsieh at quicinc.com>
>> ---
>>   .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h    | 12 +++++-----
>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h |  8 +++----
>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 26 
>> ++++++++++------------
>>   .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h    | 24 
>> ++++++++++----------
>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 26 
>> ++++++++++------------
>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h |  4 ++--
>>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h |  2 +-
>>   .../drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h    |  2 +-
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  8 +++----
>>   9 files changed, 54 insertions(+), 58 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h 
>> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
>> index 17f821c..b7cd746 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
>> @@ -112,16 +112,16 @@ static const struct dpu_lm_cfg msm8998_lm[] = {
>>   };
>>     static const struct dpu_pingpong_cfg msm8998_pp[] = {
>> -    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk_te,
>> -            DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
>> +    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 
>> BIT(DPU_PINGPONG_DSC), 0,
>> +            sdm845_pp_sblk_te, DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)),
>> -    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk_te,
>> -            DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
>> +    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 
>> BIT(DPU_PINGPONG_DSC), 0,
>> +            sdm845_pp_sblk_te, DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)),
>> -    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, sdm845_pp_sblk,
>> +    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, 0, sdm845_pp_sblk,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)),
>> -    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, sdm845_pp_sblk,
>> +    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, 0, sdm845_pp_sblk,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)),
>
> Just to doublecheck: why don't we have DPU_PINGPONG_DSC for PP_3/_4? 
> We do have them on sdm845. Is it because we should not use DSC with 
> thos PINGPONG blocks?
>
I think it only have two DSPP connect to pp blocks
>>   };
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h 
>> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
>> index ceca741..8888bd9 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
>> @@ -110,16 +110,16 @@ static const struct dpu_lm_cfg sdm845_lm[] = {
>>   };
>>     static const struct dpu_pingpong_cfg sdm845_pp[] = {
>> -    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk_te,
>> +    PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 
>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk_te,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)),
>> -    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk_te,
>> +    PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 
>> BIT(DPU_PINGPONG_DSC), 0, sdm845_pp_sblk_te,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)),
>> -    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0, sdm845_pp_sblk,
>> +    PP_BLK("pingpong_2", PINGPONG_2, 0x71000, BIT(DPU_PINGPONG_DSC), 
>> 0, sdm845_pp_sblk,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)),
>> -    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0, sdm845_pp_sblk,
>> +    PP_BLK("pingpong_3", PINGPONG_3, 0x71800, BIT(DPU_PINGPONG_DSC), 
>> 0, sdm845_pp_sblk,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)),
>>
>
> [skipped the rest, looks good to me]
>