[Freedreno] [PATCH v2 1/2] drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF

Konrad Dybcio konrad.dybcio at linaro.org
Sat Nov 25 22:19:41 UTC 2023


On 25.11.2023 20:11, Rob Clark wrote:
> From: Danylo Piliaiev <dpiliaiev at igalia.com>
> 
> Downstream always set BIT(7)
> 
> Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
> Signed-off-by: Rob Clark <robdclark at chromium.org>
> ---
FWIW this was only introduced in:

https://git.codelinaro.org/clo/la/platform/vendor/qcom/opensource/graphics-kernel/-/commit/704575ac510a6de3ae7813a851c942d19fbcb20d

(around msm-5.15 / sm8550)

Konrad


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