[PATCH v1] drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case

[Abhinav Kumar]

On 1/10/2024 12:18 PM, Kuogee Hsieh wrote:
> Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
> BPC unknown case, the additional shift causes spill over to the other
> bits of the [DP_CONFIGURATION_CTRL] register.
> Fix this by changing the return value of dp_link_get_test_bits_depth()
> in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).
> 
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <quic_khsieh at quicinc.com>
> ---
>   drivers/gpu/drm/msm/dp/dp_ctrl.c |  5 -----
>   drivers/gpu/drm/msm/dp/dp_link.c | 10 +++++++---
>   2 files changed, 7 insertions(+), 8 deletions(-)
> 

Checkpatch complained about this error:

CHECK: Alignment should match open parenthesis
#61: FILE: drivers/gpu/drm/msm/dp/dp_link.c:1203:
+               drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use 
bpc=8\n",
+                         bpp);


I will fix it while applying ... no need to spin another version for this.