[PATCH v3 1/2] arm64: dts: qcom: sa8775p: Add gpu and gmu nodes

[Akhil P Oommen]

On 11/1/2024 8:16 PM, Akhil P Oommen wrote:
> On 11/1/2024 2:00 AM, Konrad Dybcio wrote:
>> On 30.10.2024 8:02 AM, Akhil P Oommen wrote:
>>> From: Puranam V G Tejaswi <quic_pvgtejas at quicinc.com>
>>>
>>> Add gpu and gmu nodes for sa8775p chipset. As of now all
>>> SKUs have the same GPU fmax, so there is no requirement of
>>> speed bin support.
>>>
>>> Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas at quicinc.com>
>>> Signed-off-by: Akhil P Oommen <quic_akhilpo at quicinc.com>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 94 +++++++++++++++++++++++++++++++++++
>>>  1 file changed, 94 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> index e8dbc8d820a6..c6cb18193787 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> @@ -3072,6 +3072,100 @@ tcsr_mutex: hwlock at 1f40000 {
>>>  			#hwlock-cells = <1>;
>>>  		};
>>>  
>>> +		gpu: gpu at 3d00000 {
>>> +			compatible = "qcom,adreno-663.0", "qcom,adreno";
>>
>> Is the patchlevel zero for this SKU?
> 
> Yes. There is only a single revision implemented downstream.
> 
> 
>>
>>
>>> +			reg = <0x0 0x03d00000 0x0 0x40000>,
>>> +			      <0x0 0x03d9e000 0x0 0x1000>,
>>> +			      <0x0 0x03d61000 0x0 0x800>;
>>> +			reg-names = "kgsl_3d0_reg_memory",
>>> +				    "cx_mem",
>>> +				    "cx_dbgc";
>>> +			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
>>> +			iommus = <&adreno_smmu 0 0xc00>,
>>> +				 <&adreno_smmu 1 0xc00>;
>>> +			operating-points-v2 = <&gpu_opp_table>;
>>> +			qcom,gmu = <&gmu>;
>>> +			interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS
>>> +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>>> +			interconnect-names = "gfx-mem";
>>> +			#cooling-cells = <2>;
>>
>> You might want to hook this up to a thermal-zone right away
> 
> I am checking with our Thermal team on this. Will get back shortly.

It looks like it is a bit complicated. This chipset is used in
automotive platforms too which has restrictions related to thermal
throttling. Lets handle thermal zones in a separate patch.

-Akhil

> 
> -Akhil.
> 
>>
>> Konrad
>