[PATCH 2/4] drm/msm/a5xx: Get HBB dynamically, if available

[Alexey Minnekhanov]

On 4/9/25 17:47, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
> 
> The Highest Bank address Bit value can change based on memory type used.
> 
> Attempt to retrieve it dynamically, and fall back to a reasonable
> default (the one used prior to this change) on error.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
> ---
>   drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 13 +++++++++++--
>   1 file changed, 11 insertions(+), 2 deletions(-)
> 

Hi!

In the previous patch 1/4 you've said:

 > modern Qualcomm platforms (>= SM8150) expose information about
 > the DDR memory present on the system via SMEM.

If these changes affect only newer platforms, then I do not understand
how a5xx would be affected. Or do dozen of older platforms (that are
using Adreno 5xx) also expose that information?

--
Regards,
Alexey Minnekhanov