[PATCH v2 3/7] drm/msm/mdp4: register the LVDS PLL as a clock provider
Konrad Dybcio
konrad.dybcio at oss.qualcomm.com
Tue Feb 25 13:55:54 UTC 2025
On 20.02.2025 12:14 PM, Dmitry Baryshkov wrote:
> The LVDS/LCDC controller uses pixel clock coming from the multimedia
> controller (mmcc) rather than using the PLL directly. Stop using LVDS
> PLL directly and register it as a clock provider. Use lcdc_clk as a
> pixel clock for the LCDC.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
Konrad
More information about the Freedreno
mailing list