[PATCH RFT 04/14] drm/msm/a6xx: Get a handle to the common UBWC config
Konrad Dybcio
konrad.dybcio at oss.qualcomm.com
Fri May 9 12:31:07 UTC 2025
On 5/8/25 8:41 PM, Rob Clark wrote:
> On Thu, May 8, 2025 at 11:13 AM Konrad Dybcio <konradybcio at kernel.org> wrote:
>>
>> From: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
>>
>> Start the great despaghettification by getting a pointer to the common
>> UBWC configuration, which houses e.g. UBWC versions that we need to
>> make decisions.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
>> ---
>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 16 ++++++++++++++--
>> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++
>> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +++
>> 3 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> index b161b5cd991fc645dfcd69754b82be9691775ffe..89eb725f0950f3679d6214366cfbd22d5bcf4bc7 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> @@ -585,8 +585,13 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu)
>> gpu_write(gpu, REG_A6XX_CP_PROTECT(protect->count_max - 1), protect->regs[i]);
>> }
>>
>> -static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
>> +static int a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
>> {
>> + /* Inherit the common config and make some necessary fixups */
>> + gpu->common_ubwc_cfg = qcom_ubwc_config_get_data();
>
> This does look a bit funny given the devm_kzalloc() below.. I guess
> just so that the ptr is never NULL?
Yeah, would you prefer this is changed?
Konrad
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