<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Hi!<div class=""><br class=""></div><div class="">Just to let you know, I have same sensor working on Variscite iMX6 DART. Using Yocto Morty release ( <a href="http://variwiki.com/index.php?title=VAR-SOM-MX6_Yocto&release=RELEASE_MORTY_V1.0_VAR-SOM-MX6" class="">http://variwiki.com/index.php?title=VAR-SOM-MX6_Yocto&release=RELEASE_MORTY_V1.0_VAR-SOM-MX6</a> )</div><div class="">Had to hack device tree abit and that was about it. Hope you find something useful on that page.</div><div class=""><br class=""></div><div class="">Tõnu<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On 3 Jul 2018, at 22:18, Jagan Teki <<a href="mailto:jagan@amarulasolutions.com" class="">jagan@amarulasolutions.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">On Wed, Jul 4, 2018 at 12:11 AM, jacopo mondi <<a href="mailto:jacopo@jmondi.org" class="">jacopo@jmondi.org</a>> wrote:<br class=""><blockquote type="cite" class="">Hi Fabio,<br class="">  thanks for pointing Jagan to my series, but..<br class=""><br class="">On Fri, Jun 29, 2018 at 06:46:39PM -0300, Fabio Estevam wrote:<br class=""><blockquote type="cite" class="">Hi Jagan,<br class=""><br class="">On Fri, Jun 1, 2018 at 2:19 AM, Jagan Teki <<a href="mailto:jagan@amarulasolutions.com" class="">jagan@amarulasolutions.com</a>> wrote:<br class=""><br class=""><blockquote type="cite" class="">I actually tried even on video0 which I forgot to post the log [4].<br class="">Now I understand I'm trying for wrong device to capture look like<br class="">video0 which is ipu1 prepenc firing kernel oops. I'm trying to debug<br class="">this and let me know if have any suggestion to look into.<br class=""><br class="">[   56.800074] imx6-mipi-csi2: LP-11 timeout, phy_state = 0x000002b0<br class="">[   57.369660] ipu1_ic_prpenc: EOF timeout<br class="">[   57.849692] ipu1_ic_prpenc: wait last EOF timeout<br class="">[   57.855703] ipu1_ic_prpenc: pipeline start failed with -110<br class=""></blockquote><br class="">Could you please test this series from Jacopo?<br class=""><a href="https://www.mail-archive.com/linux-media@vger.kernel.org/msg133191.html" class="">https://www.mail-archive.com/linux-media@vger.kernel.org/msg133191.html</a><br class=""></blockquote></blockquote><br class="">Will verify this on my board and let you know the result.<br class=""><br class=""><blockquote type="cite" class=""><blockquote type="cite" class=""><br class="">It seems that it would fix this problem.<br class=""></blockquote><br class="">... unfortunately it does not :(<br class=""><br class="">I've been able to test on the same platform where Jagan has reported<br class="">this issue, and the CSI-2 bus still fails to startup properly...<br class=""><br class="">I do not have CSI-2 receiver driver documentation for the other platform<br class="">I am testing on and where my patches improved stability, but the i.MX6 error<br class="">reported by Jagan could be useful to help debugging what's wrong with the<br class="">serial bus initialization on that platform.<br class=""><br class="">The error comes from register MIPI_CSI_PHY_STATE of the i.MX6 MIPI_CSI-2<br class="">interface and reads as:<br class=""><br class="">0x2b0 : BIT(9) -> clock in ULPS state<br class="">        BIT(7) -> lane3 in stop state<br class="">        BIT(5) -> lane1 in stop state<br class="">        BIT(4) -> lane0 in stop state<br class=""><br class="">The i.MX6 driver wants instead that register to be:<br class=""><br class="">0x430 : BIT(10) -> clock in stop state<br class="">        BIT(5) -> lane1 in stop state<br class="">        BIT(4) -> lane0 in stop state<br class=""><br class="">So indeed it represents a useful debugging tool to have an idea of what's going<br class="">on there.<br class=""><br class="">I'm a bit puzzled by the BIT(7) as lane3 is not connected, as ov5640 is a 2<br class="">lanes sensor, and I would have a question for Jagan here: has the sensor been<br class="">validated with BSP/vendor kernels on that platform? There's a flat cable<br class="">connecting the camera module to the main board, and for high speed<br class="">differential signals that's maybe not the best possible solution...<br class=""></blockquote><br class="">Yes, I've validated through engicam Linux, [1] before verifying to<br class="">Mainline. I have similar board which posted on the website on J5 point<br class="">20-Polig connector attached to bus to sensor[2]<br class=""><br class="">[1] <a href="https://github.com/engicam-stable/engicam-kernel-4.1.15/blob/som_release/arch/arm/boot/dts/icoremx6q-icore-mipi.dts" class="">https://github.com/engicam-stable/engicam-kernel-4.1.15/blob/som_release/arch/arm/boot/dts/icoremx6q-icore-mipi.dts</a><br class="">[2] <a href="https://www.engicam.com/vis-prod/101145" class="">https://www.engicam.com/vis-prod/101145</a><br class=""><br class="">Jagan.<br class=""><br class="">-- <br class="">Jagan Teki<br class="">Senior Linux Kernel Engineer | Amarula Solutions<br class="">U-Boot, Linux | Upstream Maintainer<br class="">Hyderabad, India.<br class="">_______________________________________________<br class="">gstreamer-devel mailing list<br class=""><a href="mailto:gstreamer-devel@lists.freedesktop.org" class="">gstreamer-devel@lists.freedesktop.org</a><br class="">https://lists.freedesktop.org/mailman/listinfo/gstreamer-devel<br class=""></div></div></blockquote></div><br class=""></div></body></html>