[igt-dev] [RFC i-g-t] wsim/media-bench: i915 balancing
Tvrtko Ursulin
tursulin at ursulin.net
Thu Jan 25 13:39:57 UTC 2018
From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Support i915 virtual engine from gem_wsim (-b i915) and media-bench.pl
v2: Rebase for ctx->virtual.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
benchmarks/gem_wsim.c | 86 +++++++++++++++++++++++++++++++++++++++++++-------
scripts/media-bench.pl | 9 ++++--
2 files changed, 80 insertions(+), 15 deletions(-)
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index c15dc365ea95..4d43a9c08c6c 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -58,6 +58,17 @@
#define LOCAL_I915_EXEC_FENCE_IN (1<<16)
#define LOCAL_I915_EXEC_FENCE_OUT (1<<17)
+struct local_drm_i915_gem_context_create_v2 {
+ /* output: id of new context*/
+ __u32 ctx_id;
+ __u32 flags;
+#define LOCAL_I915_GEM_CONTEXT_SHARE_GTT 0x1
+ __u32 share_ctx;
+ __u32 virtual;
+};
+
+#define LOCAL_DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct local_drm_i915_gem_context_create_v2)
+
enum intel_engine_id {
RCS,
BCS,
@@ -219,6 +230,7 @@ static int fd;
#define HEARTBEAT (1<<7)
#define GLOBAL_BALANCE (1<<8)
#define DEPSYNC (1<<9)
+#define I915 (1<<10)
#define SEQNO_IDX(engine) ((engine) * 16)
#define SEQNO_OFFSET(engine) (SEQNO_IDX(engine) * sizeof(uint32_t))
@@ -725,6 +737,25 @@ terminate_bb(struct w_step *w, unsigned int flags)
w->mapped_len = mmap_len;
}
+#define I915_EXEC_CLASS_INSTANCE (1<<20)
+
+#define I915_EXEC_INSTANCE_SHIFT (21)
+#define I915_EXEC_INSTANCE_MASK (0xff << I915_EXEC_INSTANCE_SHIFT)
+
+#define i915_execbuffer2_engine(class, instance) \
+ (I915_EXEC_CLASS_INSTANCE | \
+ (class) | \
+ ((instance) << I915_EXEC_INSTANCE_SHIFT))
+
+static const unsigned int eb_class_map[NUM_ENGINES] = {
+ [RCS] = i915_execbuffer2_engine(I915_ENGINE_CLASS_RENDER, 0),
+ [BCS] = i915_execbuffer2_engine(I915_ENGINE_CLASS_COPY, 0),
+ [VCS] = i915_execbuffer2_engine(I915_ENGINE_CLASS_VIDEO, 0),
+ [VCS1] = i915_execbuffer2_engine(I915_ENGINE_CLASS_VIDEO, 0),
+ [VCS2] = i915_execbuffer2_engine(I915_ENGINE_CLASS_VIDEO, 1),
+ [VECS] = i915_execbuffer2_engine(I915_ENGINE_CLASS_VIDEO_ENHANCE, 0)
+};
+
static const unsigned int eb_engine_map[NUM_ENGINES] = {
[RCS] = I915_EXEC_RENDER,
[BCS] = I915_EXEC_BLT,
@@ -742,7 +773,10 @@ eb_set_engine(struct drm_i915_gem_execbuffer2 *eb,
if (engine == VCS2 && (flags & VCS2REMAP))
engine = BCS;
- eb->flags = eb_engine_map[engine];
+ if (flags & I915)
+ eb->flags = eb_class_map[engine];
+ else
+ eb->flags = eb_engine_map[engine];
}
static void
@@ -888,12 +922,27 @@ prepare_workload(unsigned int id, struct workload *wrk, unsigned int flags)
}
if (!wrk->ctx_list[w->context].id) {
- struct drm_i915_gem_context_create arg = {};
+ uint32_t ctx_id;
- drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &arg);
- igt_assert(arg.ctx_id);
+ if (flags & I915) {
+ struct local_drm_i915_gem_context_create_v2 args = { };
- wrk->ctx_list[w->context].id = arg.ctx_id;
+ args.virtual = 1;
+ drmIoctl(fd,
+ LOCAL_DRM_IOCTL_I915_GEM_CONTEXT_CREATE,
+ &args);
+ ctx_id = args.ctx_id;
+
+ } else {
+ struct drm_i915_gem_context_create args = {};
+
+ drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE,
+ &args);
+ ctx_id = args.ctx_id;
+ }
+
+ igt_assert(ctx_id);
+ wrk->ctx_list[w->context].id = ctx_id;
if (flags & GLOBAL_BALANCE) {
wrk->ctx_list[w->context].static_vcs = context_vcs_rr;
@@ -905,7 +954,7 @@ prepare_workload(unsigned int id, struct workload *wrk, unsigned int flags)
if (wrk->prio) {
struct drm_i915_gem_context_param param = {
- .ctx_id = arg.ctx_id,
+ .ctx_id = ctx_id,
.param = I915_CONTEXT_PARAM_PRIORITY,
.value = wrk->prio,
};
@@ -1446,6 +1495,12 @@ static const struct workload_balancer all_balancers[] = {
.get_qd = get_engine_busy,
.balance = busy_avg_balance,
},
+ {
+ .id = 11,
+ .name = "i915",
+ .desc = "i915 balancing.",
+ .flags = I915,
+ },
};
static unsigned int
@@ -1809,7 +1864,8 @@ static void *run_workload(void *data)
last_sync = false;
wrk->nr_bb[engine]++;
- if (engine == VCS && wrk->balancer) {
+ if (engine == VCS && wrk->balancer &&
+ wrk->balancer->balance) {
engine = wrk->balancer->balance(wrk->balancer,
wrk, w);
wrk->nr_bb[engine]++;
@@ -2321,11 +2377,17 @@ int main(int argc, char **argv)
printf("%u client%s.\n", clients, clients > 1 ? "s" : "");
if (flags & SWAPVCS)
printf("Swapping VCS rings between clients.\n");
- if (flags & GLOBAL_BALANCE)
- printf("Using %s balancer in global mode.\n",
- balancer->name);
- else if (balancer)
+ if (flags & GLOBAL_BALANCE) {
+ if (flags & I915) {
+ printf("Ignoring global balancing with i915!\n");
+ flags &= ~GLOBAL_BALANCE;
+ } else {
+ printf("Using %s balancer in global mode.\n",
+ balancer->name);
+ }
+ } else if (balancer) {
printf("Using %s balancer.\n", balancer->name);
+ }
}
if (master_workload >= 0 && clients == 1)
@@ -2342,7 +2404,7 @@ int main(int argc, char **argv)
if (flags & SWAPVCS && i & 1)
flags_ &= ~SWAPVCS;
- if (flags & GLOBAL_BALANCE) {
+ if ((flags & GLOBAL_BALANCE) && !(flags & I915)) {
w[i]->balancer = &global_balancer;
w[i]->global_wrk = w[0];
w[i]->global_balancer = balancer;
diff --git a/scripts/media-bench.pl b/scripts/media-bench.pl
index 78f45199e95d..2c7ff972baa2 100755
--- a/scripts/media-bench.pl
+++ b/scripts/media-bench.pl
@@ -47,10 +47,11 @@ my $nop;
my %opts;
my @balancers = ( 'rr', 'rand', 'qd', 'qdr', 'qdavg', 'rt', 'rtr', 'rtavg',
- 'context', 'busy', 'busy-avg' );
+ 'context', 'busy', 'busy-avg', 'i915' );
my %bal_skip_H = ( 'rr' => 1, 'rand' => 1, 'context' => 1, , 'busy' => 1,
- 'busy-avg' => 1 );
-my %bal_skip_R = ( 'context' => 1 );
+ 'busy-avg' => 1, 'i915' => 1 );
+my %bal_skip_R = ( 'context' => 1, 'i915' => 1 );
+my %bal_skip_G = ( 'i915' => 1 );
my @workloads = (
'media_load_balance_17i7.wsim',
@@ -432,6 +433,8 @@ foreach my $wrk (@workloads) {
my $bid;
if ($bal ne '') {
+ next GBAL if $G =~ '-G' and exists $bal_skip_G{$bal};
+
push @xargs, "-b $bal";
push @xargs, '-R' unless exists $bal_skip_R{$bal};
push @xargs, $G if $G ne '';
--
2.14.1
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