[igt-dev] [PATCH i-g-t 3/7] lib/rendercopy: Set the upper 32bits of surface base address on gen8+
Ville Syrjala
ville.syrjala at linux.intel.com
Wed Jul 4 16:16:42 UTC 2018
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
gen8 introduces 48 bit virtual addresses. Set both dwords correctly
as otherwise the presumed_offset will not match what we actually
have stored in the surface state if the buffer is located somewhere
above 4GiB.
I guess we're not currently using 48bit addresses with rendercopy?
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
lib/gen8_render.h | 3 +--
lib/rendercopy_gen8.c | 3 ++-
lib/rendercopy_gen9.c | 3 ++-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index 79f2f38855b9..048e667c8c95 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -155,8 +155,7 @@ struct gen8_surface_state
} ss8;
struct {
- uint32_t base_addr_hi:16;
- uint32_t pad0:16;
+ uint32_t base_addr_hi;
} ss9;
struct {
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 4406a0a0e6eb..5a9bf32e6b9b 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -172,7 +172,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
else if (buf->tiling == I915_TILING_Y)
ss->ss0.tiled_mode = 3;
- ss->ss8.base_addr = buf->bo->offset;
+ ss->ss8.base_addr = buf->bo->offset64;
+ ss->ss9.base_addr_hi = buf->bo->offset64 >> 32;
ret = drm_intel_bo_emit_reloc(batch->bo,
intel_batchbuffer_subdata_offset(batch, &ss->ss8),
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index fc5c09374c77..db59c9f4d776 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -171,7 +171,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
else if (buf->tiling == I915_TILING_Y)
ss->ss0.tiled_mode = 3;
- ss->ss8.base_addr = buf->bo->offset;
+ ss->ss8.base_addr = buf->bo->offset64;
+ ss->ss9.base_addr_hi = buf->bo->offset64 >> 32;
ret = drm_intel_bo_emit_reloc(batch->bo,
intel_batchbuffer_subdata_offset(batch, &ss->ss8),
--
2.16.4
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