[igt-dev] [PATCH i-g-t] lib: sync with the newer i915_pciids.h from the Kernel (WHL + AML)

[Rodrigo Vivi]

On Tue, Jun 19, 2018 at 03:22:14PM -0700, Rodrigo Vivi wrote:
> On Tue, Jun 19, 2018 at 03:13:08PM -0700, José Roberto de Souza wrote:
> > I just copied the Kernel file into the IGT repository.
> > 
> > Changes:
> > - b9be78531d27 - drm/i915/whl: Introducing Whiskey Lake platform
> > - e364672477a1 - drm/i915/aml: Introducing Amber Lake platform
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

I take it back... it doesn't compile...

> 
> > ---
> >  lib/i915_pciids.h | 37 +++++++++++++++++++++++++------------
> >  1 file changed, 25 insertions(+), 12 deletions(-)
> > 
> > diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> > index bab70ff6..fbf5cfc9 100644
> > --- a/lib/i915_pciids.h
> > +++ b/lib/i915_pciids.h
> > @@ -349,7 +349,6 @@
> >  #define INTEL_KBL_GT2_IDS(info)	\
> >  	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
> >  	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
> > -	INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
> >  	INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
> >  	INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
> >  	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> > @@ -365,11 +364,17 @@
> >  #define INTEL_KBL_GT4_IDS(info) \
> >  	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
> >  
> > +/* AML/KBL Y GT2 */
> > +#define INTEL_AML_GT2_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
> > +	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
> > +
> >  #define INTEL_KBL_IDS(info) \
> >  	INTEL_KBL_GT1_IDS(info), \
> >  	INTEL_KBL_GT2_IDS(info), \
> >  	INTEL_KBL_GT3_IDS(info), \
> > -	INTEL_KBL_GT4_IDS(info)
> > +	INTEL_KBL_GT4_IDS(info), \
> > +	INTEL_AML_GT2_IDS(info)
> >  
> >  /* CFL S */
> >  #define INTEL_CFL_S_GT1_IDS(info) \
> > @@ -388,32 +393,40 @@
> >  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
> >  
> > -/* CFL U GT1 */
> > -#define INTEL_CFL_U_GT1_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA1, info), \
> > -	INTEL_VGA_DEVICE(0x3EA4, info)
> > -
> >  /* CFL U GT2 */
> >  #define INTEL_CFL_U_GT2_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA0, info), \
> > -	INTEL_VGA_DEVICE(0x3EA3, info), \
> >  	INTEL_VGA_DEVICE(0x3EA9, info)
> >  
> >  /* CFL U GT3 */
> >  #define INTEL_CFL_U_GT3_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
> >  
> > +/* WHL/CFL U GT1 */
> > +#define INTEL_WHL_U_GT1_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA1, info)
> > +
> > +/* WHL/CFL U GT2 */
> > +#define INTEL_WHL_U_GT2_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA0, info)
> > +
> > +/* WHL/CFL U GT3 */
> > +#define INTEL_WHL_U_GT3_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA2, info), \
> > +	INTEL_VGA_DEVICE(0x3EA3, info), \
> > +	INTEL_VGA_DEVICE(0x3EA4, info)
> > +
> >  #define INTEL_CFL_IDS(info)	   \
> >  	INTEL_CFL_S_GT1_IDS(info), \
> >  	INTEL_CFL_S_GT2_IDS(info), \
> >  	INTEL_CFL_H_GT2_IDS(info), \
> > -	INTEL_CFL_U_GT1_IDS(info), \
> >  	INTEL_CFL_U_GT2_IDS(info), \
> > -	INTEL_CFL_U_GT3_IDS(info)
> > +	INTEL_CFL_U_GT3_IDS(info), \
> > +	INTEL_WHL_U_GT1_IDS(info), \
> > +	INTEL_WHL_U_GT2_IDS(info), \
> > +	INTEL_WHL_U_GT3_IDS(info)
> >  
> >  /* CNL */
> >  #define INTEL_CNL_IDS(info) \
> > -- 
> > 2.17.1
> >