[igt-dev] [PATCH i-g-t v2] lib: sync with the newer i915_pciids.h from the Kernel (WHL + AML)

Rodrigo Vivi rodrigo.vivi at intel.com
Tue Jun 19 23:20:47 UTC 2018


On Tue, Jun 19, 2018 at 03:56:06PM -0700, José Roberto de Souza wrote:
> I just copied the Kernel file into the IGT repository and updated
> lib/intel_device_info.c.
> 
> Changes:
> - b9be78531d27 - drm/i915/whl: Introducing Whiskey Lake platform
> - e364672477a1 - drm/i915/aml: Introducing Amber Lake platform
> 
> v2:
> Ops, I forgot to add lib/intel_device_info.c changes.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>


Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

and pushed... thanks

> ---
>  lib/i915_pciids.h       | 37 +++++++++++++++++++++++++------------
>  lib/intel_device_info.c |  5 ++++-
>  2 files changed, 29 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index bab70ff6..fbf5cfc9 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -349,7 +349,6 @@
>  #define INTEL_KBL_GT2_IDS(info)	\
>  	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
>  	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
> -	INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
>  	INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
>  	INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
>  	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> @@ -365,11 +364,17 @@
>  #define INTEL_KBL_GT4_IDS(info) \
>  	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
>  
> +/* AML/KBL Y GT2 */
> +#define INTEL_AML_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
> +	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
> +
>  #define INTEL_KBL_IDS(info) \
>  	INTEL_KBL_GT1_IDS(info), \
>  	INTEL_KBL_GT2_IDS(info), \
>  	INTEL_KBL_GT3_IDS(info), \
> -	INTEL_KBL_GT4_IDS(info)
> +	INTEL_KBL_GT4_IDS(info), \
> +	INTEL_AML_GT2_IDS(info)
>  
>  /* CFL S */
>  #define INTEL_CFL_S_GT1_IDS(info) \
> @@ -388,32 +393,40 @@
>  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
>  
> -/* CFL U GT1 */
> -#define INTEL_CFL_U_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA1, info), \
> -	INTEL_VGA_DEVICE(0x3EA4, info)
> -
>  /* CFL U GT2 */
>  #define INTEL_CFL_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA0, info), \
> -	INTEL_VGA_DEVICE(0x3EA3, info), \
>  	INTEL_VGA_DEVICE(0x3EA9, info)
>  
>  /* CFL U GT3 */
>  #define INTEL_CFL_U_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
>  
> +/* WHL/CFL U GT1 */
> +#define INTEL_WHL_U_GT1_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA1, info)
> +
> +/* WHL/CFL U GT2 */
> +#define INTEL_WHL_U_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA0, info)
> +
> +/* WHL/CFL U GT3 */
> +#define INTEL_WHL_U_GT3_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA2, info), \
> +	INTEL_VGA_DEVICE(0x3EA3, info), \
> +	INTEL_VGA_DEVICE(0x3EA4, info)
> +
>  #define INTEL_CFL_IDS(info)	   \
>  	INTEL_CFL_S_GT1_IDS(info), \
>  	INTEL_CFL_S_GT2_IDS(info), \
>  	INTEL_CFL_H_GT2_IDS(info), \
> -	INTEL_CFL_U_GT1_IDS(info), \
>  	INTEL_CFL_U_GT2_IDS(info), \
> -	INTEL_CFL_U_GT3_IDS(info)
> +	INTEL_CFL_U_GT3_IDS(info), \
> +	INTEL_WHL_U_GT1_IDS(info), \
> +	INTEL_WHL_U_GT2_IDS(info), \
> +	INTEL_WHL_U_GT3_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_IDS(info) \
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index cc417ed5..5233be21 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -345,15 +345,18 @@ static const struct pci_id_match intel_device_match[] = {
>  	INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
>  	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
>  	INTEL_KBL_GT4_IDS(&intel_kabylake_gt4_info),
> +	INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
>  
>  	INTEL_GLK_IDS(&intel_geminilake_info),
>  
>  	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
> -	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> +	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> +	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> +	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  
> -- 
> 2.17.1
> 


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