[igt-dev] [PATCH i-g-t 3/3] tools/aubdump: For gen10+ support addresses up to 4GB
Jordan Justen
jordan.l.justen at intel.com
Wed Mar 7 08:42:09 UTC 2018
On 2018-03-07 00:31:21, Jordan Justen wrote:
> For gen10, we now add mappings for buffers as they are needed.
>
> Instead of doing this dynamically, we could always map the entire 4GB.
> With 4KB pages, the tables would take up 8MB in every AUB. AUBs are
> often quite huge compared to 8MB, but they can also be just a few
> hundred KB.
>
> This should allow the AUB to create up to about 4GB of allocated
> buffers, whereas before we were limited to about 64MB.
>
> While it is unlikely that we'll try to capture AUBs that generate
> buffers up to 4GB in size, this change also should allow pinned
> buffers to be used anywhere in the first 4GB. (I tested a pinned
> buffer at 0xf0000000.)
>
> Cc: Scott D Phillips <scott.d.phillips at intel.com>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
> tools/aubdump.c | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index dc5db9dc..473dea4b 100644
> --- a/tools/aubdump.c
> +++ b/tools/aubdump.c
> @@ -504,6 +504,12 @@ gen8_map_ggtt_range(uint64_t start, uint64_t end)
> }
> }
>
> +static void
> +gen8_map_base_size(uint64_t base, uint64_t size)
> +{
> + gen8_map_range(base, base + size);
Whoops. s/gen8_map_range/gen8_map_ggtt_range/
Updated in git://people.freedesktop.org/~jljusten/intel-gpu-tools aubdump
> +}
> +
> static void
> gen10_write_header(void)
> {
> @@ -524,15 +530,16 @@ gen10_write_header(void)
> dword_out(0); /* version */
> data_out(app_name, app_name_len);
>
> - gen8_map_ggtt_range(0, MEMORY_MAP_SIZE);
> -
> /* RENDER_RING */
> + gen8_map_base_size(RENDER_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(RENDER_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* RENDER_PPHWSP */
> + gen8_map_base_size(RENDER_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(render_context_init));
> mem_trace_memory_write_header_out(RENDER_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(render_context_init),
> @@ -544,12 +551,15 @@ gen10_write_header(void)
> data_out(render_context_init, sizeof(render_context_init));
>
> /* BLITTER_RING */
> + gen8_map_base_size(BLITTER_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(BLITTER_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* BLITTER_PPHWSP */
> + gen8_map_base_size(BLITTER_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(blitter_context_init));
> mem_trace_memory_write_header_out(BLITTER_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(blitter_context_init),
> @@ -561,12 +571,15 @@ gen10_write_header(void)
> data_out(blitter_context_init, sizeof(blitter_context_init));
>
> /* VIDEO_RING */
> + gen8_map_base_size(VIDEO_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(VIDEO_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* VIDEO_PPHWSP */
> + gen8_map_base_size(VIDEO_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(video_context_init));
> mem_trace_memory_write_header_out(VIDEO_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(video_context_init),
> @@ -961,6 +974,9 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
> if (bo->map == NULL && bo->size > 0)
> bo->map = gem_mmap(fd, obj->handle, 0, bo->size);
> fail_if(bo->map == MAP_FAILED, "intel_aubdump: bo mmap failed\n");
> +
> + if (gen >= 10)
> + gen8_map_range(bo->offset, bo->offset + bo->size);
s/gen8_map_range/gen8_map_ggtt_range/
> }
>
> batch_index = (execbuffer2->flags & I915_EXEC_BATCH_FIRST) ? 0 :
> --
> 2.16.1
>
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