[igt-dev] [PATCH i-g-t] tools/registers: Add icelake register file

Mon Nov 19 09:45:48 UTC 2018

>-----Original Message-----
>From: igt-dev [mailto:igt-dev-bounces at lists.freedesktop.org] On Behalf Of
>Karthik B S
>Sent: Monday, October 1, 2018 4:33 PM
>To: igt-dev at lists.freedesktop.org
>Cc: Navare, Manasi D <manasi.d.navare at intel.com>; B, Jeevan
><jeevan.b at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>
>Subject: [igt-dev] [PATCH i-g-t] tools/registers: Add icelake register file
>
>Added a file that contains additional registers corresponding to icelake which are
>not present in the skylake file.

You may modify this comment, since it also adds an icelake register spec file and then
defines extra registers for icelake. It uses skylake and the newly added extra register
file for ICL register definitions.

Rest looks ok to me. With the above fixed,
Reviewed-by: Uma Shankar <uma.shankar at intel.com>

>Signed-off-by: Karthik B S <karthik.b.s at intel.com>
>---
> tools/registers/icelake       |   2 +
> tools/registers/icl_delta.txt | 229
>++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 231 insertions(+)
> create mode 100644 tools/registers/icelake  create mode 100644
>tools/registers/icl_delta.txt
>
>diff --git a/tools/registers/icelake b/tools/registers/icelake new file mode 100644
>index 0000000..9e799dc
>--- /dev/null
>+++ b/tools/registers/icelake
>@@ -0,0 +1,2 @@
>+skylake
>+icl_delta.txt
>diff --git a/tools/registers/icl_delta.txt b/tools/registers/icl_delta.txt new file
>mode 100644 index 0000000..0323cfe
>--- /dev/null
>+++ b/tools/registers/icl_delta.txt
>@@ -0,0 +1,229 @@
>+# PIPE_A_PLANE
>+('PLANE_AUX_DIST_4_A', '0x704c0', '')
>+('PLANE_AUX_DIST_5_A', '0x705c0', '')
>+('PLANE_AUX_DIST_6_A', '0x706c0', '')
>+('PLANE_AUX_DIST_7_A', '0x707c0', '')
>+('PLANE_CTL_4_A', '0x70480', '')
>+('PLANE_CTL_5_A', '0x70580', '')
>+('PLANE_CTL_6_A', '0x70680', '')
>+('PLANE_CTL_7_A', '0x70780', '')
>+('PLANE_BUF_CFG_4_A', '0x7057c', '')
>+('PLANE_BUF_CFG_5_A', '0x7067c', '')
>+('PLANE_BUF_CFG_6_A', '0x7077c', '')
>+('PLANE_BUF_CFG_7_A', '0x7087c', '')
>+('PLANE_COLOR_CTL_1_A', '0x701cc', '')
>+('PLANE_COLOR_CTL_2_A', '0x702cc', '')
>+('PLANE_COLOR_CTL_3_A', '0x703cc', '')
>+('PLANE_COLOR_CTL_4_A', '0x704cc', '')
>+('PLANE_COLOR_CTL_5_A', '0x705cc', '')
>+('PLANE_COLOR_CTL_6_A', '0x706cc', '')
>+('PLANE_COLOR_CTL_7_A', '0x707cc', '')
>+('PLANE_KEYMAX_4_A', '0x704a0', '')
>+('PLANE_KEYMAX_5_A', '0x705a0', '')
>+('PLANE_KEYMAX_6_A', '0x706a0', '')
>+('PLANE_KEYMAX_7_A', '0x707a0', '')
>+('PLANE_NV12_BUF_CFG_4_A', '0x70578', '') ('PLANE_NV12_BUF_CFG_5_A',
>+'0x70678', '') ('PLANE_NV12_BUF_CFG_6_A', '0x70778', '')
>+('PLANE_NV12_BUF_CFG_7_A', '0x70878', '') ('PLANE_POS_4_A', '0x7048c',
>+'') ('PLANE_POS_5_A', '0x7058c', '') ('PLANE_POS_6_A', '0x7068c', '')
>+('PLANE_POS_7_A', '0x7078c', '') ('PLANE_SIZE_4_A', '0x70490', '')
>+('PLANE_SIZE_5_A', '0x70590', '') ('PLANE_SIZE_6_A', '0x70690', '')
>+('PLANE_SIZE_7_A', '0x70790', '') ('PLANE_WM_4_A_0', '0x70540', '')
>+('PLANE_WM_4_A_1', '0x70544', '') ('PLANE_WM_4_A_2', '0x70548', '')
>+('PLANE_WM_4_A_3', '0x7054c', '') ('PLANE_WM_4_A_4', '0x70550', '')
>+('PLANE_WM_4_A_5', '0x70554', '') ('PLANE_WM_4_A_6', '0x70558', '')
>+('PLANE_WM_4_A_7', '0x7055c', '') ('PLANE_WM_5_A_0', '0x70640', '')
>+('PLANE_WM_5_A_1', '0x70644', '') ('PLANE_WM_5_A_2', '0x70648', '')
>+('PLANE_WM_5_A_3', '0x7064c', '') ('PLANE_WM_5_A_4', '0x70650', '')
>+('PLANE_WM_5_A_5', '0x70654', '') ('PLANE_WM_5_A_6', '0x70658', '')
>+('PLANE_WM_5_A_7', '0x7065c', '') ('PLANE_WM_6_A_0', '0x70740', '')
>+('PLANE_WM_6_A_1', '0x70744', '') ('PLANE_WM_6_A_2', '0x70748', '')
>+('PLANE_WM_6_A_3', '0x7074c', '') ('PLANE_WM_6_A_4', '0x70750', '')
>+('PLANE_WM_6_A_5', '0x70754', '') ('PLANE_WM_6_A_6', '0x70758', '')
>+('PLANE_WM_6_A_7', '0x7075c', '') ('PLANE_WM_7_A_0', '0x70840', '')
>+('PLANE_WM_7_A_1', '0x70844', '') ('PLANE_WM_7_A_2', '0x70848', '')
>+('PLANE_WM_7_A_3', '0x7084c', '') ('PLANE_WM_7_A_4', '0x70850', '')
>+('PLANE_WM_7_A_5', '0x70854', '') ('PLANE_WM_7_A_6', '0x70858', '')
>+('PLANE_WM_7_A_7', '0x7085c', '') ('PLANE_WM_TRANS_4_A', '0x70568', '')
>+('PLANE_WM_TRANS_5_A', '0x70668', '') ('PLANE_WM_TRANS_6_A', '0x70768',
>+'') ('PLANE_WM_TRANS_7_A', '0x70868', '') # PIPE_B_PLANE
>+('PLANE_AUX_DIST_4_B', '0x714c0', '') ('PLANE_AUX_DIST_5_B', '0x715c0',
>+'') ('PLANE_AUX_DIST_6_B', '0x716c0', '') ('PLANE_AUX_DIST_7_B',
>+'0x717c0', '') ('PLANE_CTL_4_B', '0x71480', '') ('PLANE_CTL_5_B',
>+'0x71580', '') ('PLANE_CTL_6_B', '0x71680', '') ('PLANE_CTL_7_B',
>+'0x71780', '') ('PLANE_BUF_CFG_4_B', '0x7157c', '')
>+('PLANE_BUF_CFG_5_B', '0x7167c', '') ('PLANE_BUF_CFG_6_B', '0x7177c',
>+'') ('PLANE_BUF_CFG_7_B', '0x7187c', '') ('PLANE_COLOR_CTL_1_B',
>+'0x711cc', '') ('PLANE_COLOR_CTL_2_B', '0x712cc', '')
>+('PLANE_COLOR_CTL_3_B', '0x713cc', '') ('PLANE_COLOR_CTL_4_B',
>+'0x714cc', '') ('PLANE_COLOR_CTL_5_B', '0x715cc', '')
>+('PLANE_COLOR_CTL_6_B', '0x716cc', '') ('PLANE_COLOR_CTL_7_B',
>+'0x717cc', '') ('PLANE_KEYMAX_4_B', '0x714a0', '') ('PLANE_KEYMAX_5_B',
>+'0x715a0', '') ('PLANE_KEYMAX_6_B', '0x716a0', '') ('PLANE_KEYMAX_7_B',
>+'0x717a0', '') ('PLANE_NV12_BUF_CFG_4_B', '0x71578', '')
>+('PLANE_NV12_BUF_CFG_5_B', '0x71678', '') ('PLANE_NV12_BUF_CFG_6_B',
>+'0x71778', '') ('PLANE_NV12_BUF_CFG_7_B', '0x71878', '')
>+('PLANE_POS_4_B', '0x7148c', '') ('PLANE_POS_5_B', '0x7158c', '')
>+('PLANE_POS_6_B', '0x7168c', '') ('PLANE_POS_7_B', '0x7178c', '')
>+('PLANE_SIZE_4_B', '0x71490', '') ('PLANE_SIZE_5_B', '0x71590', '')
>+('PLANE_SIZE_6_B', '0x71690', '') ('PLANE_SIZE_7_B', '0x71790', '')
>+('PLANE_WM_4_B_0', '0x71540', '') ('PLANE_WM_4_B_1', '0x71544', '')
>+('PLANE_WM_4_B_2', '0x71548', '') ('PLANE_WM_4_B_3', '0x7154c', '')
>+('PLANE_WM_4_B_4', '0x71550', '') ('PLANE_WM_4_B_5', '0x71554', '')
>+('PLANE_WM_4_B_6', '0x71558', '') ('PLANE_WM_4_B_7', '0x7155c', '')
>+('PLANE_WM_5_B_0', '0x71640', '') ('PLANE_WM_5_B_1', '0x71644', '')
>+('PLANE_WM_5_B_2', '0x71648', '') ('PLANE_WM_5_B_3', '0x7164c', '')
>+('PLANE_WM_5_B_4', '0x71650', '') ('PLANE_WM_5_B_5', '0x71654', '')
>+('PLANE_WM_5_B_6', '0x71658', '') ('PLANE_WM_5_B_7', '0x7165c', '')
>+('PLANE_WM_6_B_0', '0x71740', '') ('PLANE_WM_6_B_1', '0x71744', '')
>+('PLANE_WM_6_B_2', '0x71748', '') ('PLANE_WM_6_B_3', '0x7174c', '')
>+('PLANE_WM_6_B_4', '0x71750', '') ('PLANE_WM_6_B_5', '0x71754', '')
>+('PLANE_WM_6_B_6', '0x71758', '') ('PLANE_WM_6_B_7', '0x7175c', '')
>+('PLANE_WM_7_B_0', '0x71840', '') ('PLANE_WM_7_B_1', '0x71844', '')
>+('PLANE_WM_7_B_2', '0x71848', '') ('PLANE_WM_7_B_3', '0x7184c', '')
>+('PLANE_WM_7_B_4', '0x71850', '') ('PLANE_WM_7_B_5', '0x71854', '')
>+('PLANE_WM_7_B_6', '0x71858', '') ('PLANE_WM_7_B_7', '0x7185c', '')
>+('PLANE_WM_TRANS_4_B', '0x71568', '') ('PLANE_WM_TRANS_5_B', '0x71668',
>+'') ('PLANE_WM_TRANS_6_B', '0x71768', '') ('PLANE_WM_TRANS_7_B',
>+'0x71868', '') # PIPE_C_PLANE ('PLANE_AUX_DIST_4_C', '0x724c0', '')
>+('PLANE_AUX_DIST_5_C', '0x725c0', '') ('PLANE_AUX_DIST_6_C', '0x726c0',
>+'') ('PLANE_AUX_DIST_7_C', '0x727c0', '') ('PLANE_CTL_4_C', '0x72480',
>+'') ('PLANE_CTL_5_C', '0x72580', '') ('PLANE_CTL_6_C', '0x72680', '')
>+('PLANE_CTL_7_C', '0x72780', '') ('PLANE_BUF_CFG_4_C', '0x7257c', '')
>+('PLANE_BUF_CFG_5_C', '0x7267c', '') ('PLANE_BUF_CFG_6_C', '0x7277c',
>+'') ('PLANE_BUF_CFG_7_C', '0x7287c', '') ('PLANE_COLOR_CTL_1_C',
>+'0x721cc', '') ('PLANE_COLOR_CTL_2_C', '0x722cc', '')
>+('PLANE_COLOR_CTL_3_C', '0x723cc', '') ('PLANE_COLOR_CTL_4_C',
>+'0x724cc', '') ('PLANE_COLOR_CTL_5_C', '0x725cc', '')
>+('PLANE_COLOR_CTL_6_C', '0x726cc', '') ('PLANE_COLOR_CTL_7_C',
>+'0x727cc', '') ('PLANE_KEYMAX_4_C', '0x724a0', '') ('PLANE_KEYMAX_5_C',
>+'0x725a0', '') ('PLANE_KEYMAX_6_C', '0x726a0', '') ('PLANE_KEYMAX_7_C',
>+'0x727a0', '') ('PLANE_NV12_BUF_CFG_4_C', '0x72578', '')
>+('PLANE_NV12_BUF_CFG_5_C', '0x72678', '') ('PLANE_NV12_BUF_CFG_6_C',
>+'0x72778', '') ('PLANE_NV12_BUF_CFG_7_C', '0x72878', '')
>+('PLANE_POS_4_C', '0x7248c', '') ('PLANE_POS_5_C', '0x7258c', '')
>+('PLANE_POS_6_C', '0x7268c', '') ('PLANE_POS_7_C', '0x7278c', '')
>+('PLANE_SIZE_4_C', '0x72490', '') ('PLANE_SIZE_5_C', '0x72590', '')
>+('PLANE_SIZE_6_C', '0x72690', '') ('PLANE_SIZE_7_C', '0x72790', '')
>+('PLANE_WM_4_C_0', '0x72540', '') ('PLANE_WM_4_C_1', '0x72544', '')
>+('PLANE_WM_4_C_2', '0x72548', '') ('PLANE_WM_4_C_3', '0x7254c', '')
>+('PLANE_WM_4_C_4', '0x72550', '') ('PLANE_WM_4_C_5', '0x72554', '')
>+('PLANE_WM_4_C_6', '0x72558', '') ('PLANE_WM_4_C_7', '0x7255c', '')
>+('PLANE_WM_5_C_0', '0x72640', '') ('PLANE_WM_5_C_1', '0x72644', '')
>+('PLANE_WM_5_C_2', '0x72648', '') ('PLANE_WM_5_C_3', '0x7264c', '')
>+('PLANE_WM_5_C_4', '0x72650', '') ('PLANE_WM_5_C_5', '0x72654', '')
>+('PLANE_WM_5_C_6', '0x72658', '') ('PLANE_WM_5_C_7', '0x7265c', '')
>+('PLANE_WM_6_C_0', '0x72740', '') ('PLANE_WM_6_C_1', '0x72744', '')
>+('PLANE_WM_6_C_2', '0x72748', '') ('PLANE_WM_6_C_3', '0x7274c', '')
>+('PLANE_WM_6_C_4', '0x72750', '') ('PLANE_WM_6_C_5', '0x72754', '')
>+('PLANE_WM_6_C_6', '0x72758', '') ('PLANE_WM_6_C_7', '0x7275c', '')
>+('PLANE_WM_7_C_0', '0x72840', '') ('PLANE_WM_7_C_1', '0x72844', '')
>+('PLANE_WM_7_C_2', '0x72848', '') ('PLANE_WM_7_C_3', '0x7284c', '')
>+('PLANE_WM_7_C_4', '0x72850', '') ('PLANE_WM_7_C_5', '0x72854', '')
>+('PLANE_WM_7_C_6', '0x72858', '') ('PLANE_WM_7_C_7', '0x7285c', '')
>+('PLANE_WM_TRANS_4_C', '0x72468', '') ('PLANE_WM_TRANS_5_C', '0x72468',
>+'') ('PLANE_WM_TRANS_6_C', '0x72468', '') ('PLANE_WM_TRANS_7_C',
>+'0x72468', '') # TRANSCODER_DSI_DDI_CONTROL
>('TRANS_DDI_FUNC_CTL_DSI0',
>+'0x6b400', '') ('TRANS_DDI_FUNC_CTL_DSI1', '0x6bc00', '') #
>+TRANSCODER_DSI_TIMING ('TRANS_HTOTAL_DSI0', '0x6b000', '')
>+('TRANS_HTOTAL_DSI1', '0x6b800', '') ('TRANS_VTOTAL_DSI0', '0x6b00c',
>+'') ('TRANS_VTOTAL_DSI1', '0x6b80c', '') # MBUS_CTL ('MBUS_ABOX_CTL',
>+'0x45038', '') ('MBUS_DBOX_CTL_A', '0x7003c', '') ('MBUS_DBOX_CTL_B',
>+'0x7103c', '') ('MBUS_DBOX_CTL_C', '0x7203c', '')
>--
>2.7.4
>
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