[igt-dev] [PATCH i-g-t v1 3/6] [intel-gfx] tests/pm_dc : Added test to validate DC6 state on Gen11 platform. On Gen11 Platform, DC6 is achieved with PSR entry.

[Jyoti Yadav]

Signed-off-by: Jyoti Yadav <jyoti.r.yadav at intel.com>
---
 tests/pm_dc.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/tests/pm_dc.c b/tests/pm_dc.c
index db38ccf..b609fad 100644
--- a/tests/pm_dc.c
+++ b/tests/pm_dc.c
@@ -132,6 +132,20 @@ static uint32_t read_dc3_dc5_counter(uint32_t dev_id)
 	return dc3_dc5_count;
 }
 
+static uint32_t read_dc5_dc6_counter(uint32_t dev_id)
+{
+	uint32_t dc5_dc6_count;
+
+	if (IS_SKYLAKE(dev_id) || IS_ICELAKE(dev_id))
+		dc5_dc6_count = INREG(SKL_CSR_DC5_DC6_COUNT);
+	else {
+		igt_warn("Currently DC6 support is for ICL, SKL Platform (%s)\n",
+			__func__);
+		return -EPERM;
+	}
+	return dc5_dc6_count;
+}
+
 static void test_dc5(data_t *data)
 {
 	uint32_t dc3_dc5_counter_before_psr, dc3_dc5_counter_after_psr;
@@ -147,6 +161,7 @@ static void test_dc5(data_t *data)
 int main(int argc, char *argv[])
 {
 	data_t data = {};
+	uint32_t dc5_dc6_counter_before_psr, dc5_dc6_counter_after_psr;
 
 	igt_skip_on_simulation();
 	igt_fixture {
@@ -170,6 +185,14 @@ int main(int argc, char *argv[])
 		test_dc5(&data);
 		cleanup(&data);
 	}
+	igt_subtest("DC6_state_on_gen11") {
+		dc5_dc6_counter_before_psr = read_dc5_dc6_counter(data.devid);
+		test_dc5(&data);
+		dc5_dc6_counter_after_psr = read_dc5_dc6_counter(data.devid);
+		igt_require_f(dc5_dc6_counter_after_psr > dc5_dc6_counter_before_psr,
+				"DC6 State is not achieved\n");
+		cleanup(&data);
+	}
 	igt_fixture {
 		psr_disable(data.debugfs_fd);
 		close(data.debugfs_fd);
-- 
2.7.4